Array Substrate Single Patterning Via Hole Reduction
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Solution Overview
Problem
The existing manufacturing processes for thin film transistor liquid crystal displays (TFT-LCDs) require two patterning processes for the planarization and passivation layers, resulting in large via holes and a reduced aperture ratio, which affects the display effect of images.
Innovation Solution
A method to form both the planarization and passivation layers using a single patterning process, reducing the size of via holes and increasing the aperture ratio, by coating a photoresist layer, exposing, and developing it with a mask, and then removing the unnecessary material, allowing for smoother connection of the thin film transistor components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If two patterning processes are used to form the planarization layer and passivation layer patterns, then the manufacturing process can be completed, but the via hole size becomes too large and the aperture ratio decreases
Solution Approach 1:
The patent combines the patterning processes for the planarization layer and passivation layer into a single simultaneous patterning operation. By forming both patterns in one process step rather than sequentially, the via hole sizes in both layers are reduced and can be made to overlap more effectively, thereby increasing the aperture ratio while maintaining manufacturability
2Adaptability or versatility
If two patterning processes are used, then each layer can be formed independently, but the number of manufacturing steps increases and productivity decreases
Solution Approach 1:
The patent merges two separate patterning processes into one simultaneous patterning process that forms both the planarization layer pattern and passivation layer pattern in a single operation. This reduces the total number of manufacturing steps and increases productivity while still achieving the required independent layer formation through the simultaneous patterning approach
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach decreases the number of patterning processes, reduces via hole size, and enhances the display effect by increasing the aperture ratio of the display device.
Implementation Method 1
coating a photoresist layer, exposing, and developing it with a mask
Data Source
AI summary
An array substrate and manufacturing method thereof and a display panel are disclosed. The manufacturing method of an array substrate includes: forming patterns of a thin film transistor, a planarization layer and a passivation layer on a base substrate, the pattern of the thin film transistor including patterns of a gate electrode, a gate insulation layer, an active layer and source and drain electrodes; patterns of the planarization layer and the passivation layer are formed by one patterning process. With the manufacturing method of the array substrate, the number of patterning processes during manufacturing of the array substrate can be decreased. Furthermore, the size of via holes in the planarization layer and the passivation layer can be decreased, thereby increasing the aperture ratio of the display device and enhancing the display effect of images.