Array Substrate Single-Via Layout for Higher Display Aperture

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Solution Overview

Problem

The IADS display mode suffers from a small aperture ratio and low yield due to its dual-hole structure, which requires a larger structure space, reduces the pixel electrode area, and affects the uniformity of the orientation film, leading to display defects like panel stains.

Innovation Solution

An array substrate with a single transferring through hole that connects both the drain and pixel electrodes, reducing the number of through holes and increasing the aperture ratio, while ensuring the diffusion uniformity of the orientation film and improving product quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a dual-hole structure is used to connect the source/drain electrode and pixel electrode, then the connection is established, but the aperture ratio is reduced and the pixel electrode area is decreased

Engineering Contradiction:
Improveconnection reliabilityVSAvoidaperture ratio
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the two separate through holes (first through hole for source/drain electrode connection and second through hole for pixel electrode connection) into a single integrated through hole. This single through hole simultaneously connects both the source/drain electrode and the pixel electrode, eliminating the need for two separate holes and thereby increasing the aperture ratio while maintaining reliable electrical connections.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single through hole serves multiple functions: it acts as both the first through hole for connecting the source/drain electrode and the second through hole for connecting the pixel electrode. This multi-functional design reduces the overall structure space required and increases the pixel electrode area without compromising connection reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If a dual-hole structure is used, then the electrode connection is achieved, but the orientation film uniformity is affected and display defects occur

Engineering Contradiction:
Improveelectrode connectionVSAvoidorientation film uniformity
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

By combining two separate through holes into one, the patent reduces the number of interfaces and structural discontinuities that disrupt orientation film deposition. The single through hole creates a more uniform surface for orientation film formation, eliminating display defects like panel stains while maintaining proper electrode connections.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If the dual-hole structure is implemented, then the signal transmission is established, but the manufacturing complexity increases

Engineering Contradiction:
Improvesignal transmissionVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent simplifies the manufacturing process by merging the formation of two separate through holes into a single through hole creation step. This reduces the number of patterning and etching steps required, decreases manufacturing complexity, and maintains reliable signal transmission between electrodes.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP3913427B1Array substrate and method for preparing same, and display panel
Publication Date: 2024.02.28 BOE TECHNOLOGY GROUP CO LTD
  • EP3913427B1 patent drawingFigure 1~2
  • EP3913427B1 patent drawingFigure 3~4
  • EP3913427B1 patent drawingFigure 5~6

AI summary

Disclosed are an array substrate and a method for preparing same, and a display panel. The array substrate comprises: a base (10); a pixel electrode (50) and a thin-film transistor which are provided on the base (10); a passivation layer (16) covering the thin-film transistor and the pixel electrode (50), wherein an adapting via hole (K1, K2), which simultaneously exposes the pixel electrode (50) and a drain electrode (15) or a source electrode (14) of the thin-film transistor, is provided in the passivation layer (16); and a connection electrode (60) which is provided on the passivation layer (16) and is at the adapting via hole (K1, K2), wherein the connection electrode (60) is simultaneously connected, through the adapting via hole (K1, K2), to the pixel electrode (50) and the drain electrode (15) or the source electrode (14). Realizing connection between the drain electrode (15) or the source electrode (14) and the pixel electrode (50) by providing the adapting via hole (K1, K2) effectively reduces the number of via holes, increases an aperture ratio of the display panel, improves product quality, and improves the yield.