Staggered Via Holes in Array Substrates for Coating Control
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Solution Overview
Problem
The existing array substrate fabrication processes for HADS technology face challenges in controlling the coating process due to large via holes required to reduce coupling capacitance, leading to difficulties in film layer coating and increased moire production, which affects the yield of array substrates.
Innovation Solution
The array substrate design includes a connecting electrode that is electrically connected through staggered first and second via holes in the gate insulating and passivation layers, respectively, allowing for reduced hole depths and sizes, thereby improving the control over the coating process and preventing moire formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the passivation layer is made thicker to reduce coupling capacitance between the common electrode and data line, then the coupling capacitance is reduced, but the via hole depth and size must be increased to ensure electrical connection, which makes the coating process difficult to control and easily invokes moires on the coated film layer
Solution Approach 1:
The patent divides the single deep via hole penetrating both gate insulating layer and passivation layer into two separate via holes: a first via hole in the gate insulating layer and a second via hole in the passivation layer. These two via holes are staggered in position, with the second via hole offset from the first. This segmentation allows each via hole to be shallower and smaller, making the coating process easier to control while maintaining electrical connection through the connecting electrode that spans both via holes.
2Reliability
If the via hole depth and size are increased to ensure electrical connection through thicker passivation layer, then the electrical connection is ensured, but the coating process becomes difficult to control and moires are easily invoked on the coated film layer
Solution Approach 1:
The deep via hole is segmented into two shallower via holes positioned at different locations. The first via hole provides electrical connection through the gate insulating layer, and the second via hole provides connection through the passivation layer. The connecting electrode bridges these two staggered via holes, ensuring effective electrical connection while keeping each individual via hole shallow and small for easier coating process control.
Solution Approach 2:
The connecting electrode acts as an intermediary element that bridges the two staggered via holes. It provides the electrical connection path between the common electrode line and the common electrode, allowing the via holes to be smaller and shallower while maintaining connection effectiveness. The intermediary electrode compensates for the discontinuity created by staggering the via holes.
Data Source
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AI summary
An array substrate and a fabricating method thereof, a display panel and a display apparatus are disclosed. The array substrate comprises a base substrate (1) and a gate metal layer (2, 3), a gate insulating layer (4), an active layer (5), a source-drain electrode metal layer (7, 8), a passivation layer (10) and a common electrode layer (11) which are sequentially formed on the base substrate, as well as a pixel electrode layer (6) which is positioned between the active layer and the source-drain electrode metal layer or between the source-drain electrode metal layer and the passivation layer; the gate metal layer including a gate electrode (2) and a common electrode line (3). The pixel electrode layer or the source-drain electrode metal layer includes a connecting electrode (12), the connecting electrode being electrically connected with the common electrode line through a first via hole (13) in the gate insulating layer, and the connecting electrode being electrically connected with the common electrode of the common electrode layer through a second via hole (14) in the passivation layer.