Array Substrate Bonding Layout for Static Charge Blocking

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Solution Overview

Problem

High-resolution display devices face significant damage from static electricity accumulation due to high wiring density, leading to electric discharge and potential damage to internal components and circuit structures within the array substrate.

Innovation Solution

Incorporation of an electrostatic barrier line with higher resistivity than the bonding electrode, extending to the outer edge of the bonding region, which blocks and disperses external static electricity, reducing accumulation and damage within the array substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If wiring density on the array substrate is increased to achieve high-resolution display, then display resolution is improved, but static electricity accumulation and electric discharge damage become more serious

Engineering Contradiction:
Improvedisplay resolutionVSAvoidstatic electricity damage
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an electrostatic barrier line as an intermediary element between the bonding electrode and the display region. This barrier line acts as a mediator that blocks and disperses static electricity, preventing it from reaching and damaging the high-density wiring and internal components of the high-resolution display device.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent converts the harmful static electricity into a beneficial protective mechanism by designing the electrostatic barrier line to actively block and disperse static charges. The barrier line transforms the potential damage from static electricity into a controlled electrostatic protection system that safeguards the display device.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Ease of manufacture

If bonding electrode is placed at the outer edge of the bonding region for easy connection, then ease of manufacture is improved, but static electricity easily enters the array substrate causing damage

Engineering Contradiction:
Improvebonding connection easeVSAvoidstatic electricity entry
Core Design Contradiction:
Ease of manufactureVSObject-affected harmful factors

Solution Approach 1:

The electrostatic barrier line serves as an intermediary barrier between the bonding electrode (which remains accessible at the bonding region edge for manufacturing) and the vulnerable display region. This mediator allows the bonding electrode to maintain its edge position for ease of connection while blocking the harmful static electricity from entering the substrate through the same path.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the bonding region by introducing the electrostatic barrier line that divides the space between the bonding electrode and the display region. This segmentation creates a protected zone that separates the manufacturing-accessible bonding area from the vulnerable internal circuitry, allowing both ease of manufacture and protection to coexist.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The electrostatic barrier line effectively prevents static electricity from entering the array substrate, reducing internal damage and enhancing the structural integrity of the display device by dispersing static charges, thus alleviating the risk of electric discharge.

Implementation Method 1

resistivity of the electrostatic barrier line is larger than resistivity of the bonding electrode

Methodology Applied
Scientific EffectElectrical Resistance: Electrical Resistance

Data Source

PatentUS11943979B2Array substrate and fabrication method thereof, array substrate motherboard and display device
Publication Date: 2024.03.26 BOE TECHNOLOGY GROUP CO LTD
  • US11943979B2 patent drawing
  • US11943979B2 patent drawing
  • US11943979B2 patent drawing

AI summary

An array substrate and a fabrication method thereof, an array substrate motherboard, and a display device are disclosed. The array substrate includes a display region and a bonding region outside the display region. The array substrate further includes: a bonding electrode, located in the bonding region and spaced apart from an outer edge of the bonding region; and an electrostatic barrier line, the electrostatic barrier line has one end electrically connected with the bonding electrode, and the other end extends to the outer edge of the bonding region, and resistivity of the electrostatic barrier line is greater than resistivity of the bonding electrode.