Array Substrate Storage Capacitor Aperture Ratio

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Solution Overview

Problem

Conventional LCD devices face a trade-off between enhancing aperture ratio and maintaining capacitance, as increasing the overlapping area between electrodes to boost capacitance reduces the aperture ratio.

Innovation Solution

The array substrate design includes a storage capacitor with a second storage capacitor electrode formed on the gate insulation layer, using a partial exposure process to remove part of the passivation layer, allowing for enhanced capacitance without reducing the aperture ratio.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the overlapping area between two electrodes of the storage capacitor is increased to enhance capacitance, then the capacitance of the storage capacitor increases, but the aperture ratio of the LCD panel decreases

Engineering Contradiction:

Improvecapacitance of storage capacitorVSAvoidaperture ratio

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent utilizes the vertical dimension by forming the second storage capacitor electrode on the gate insulation layer, which is positioned above the first storage capacitor electrode. This three-dimensional stacking arrangement increases the effective overlapping area for capacitance without consuming additional planar area, thereby resolving the contradiction between enhancing capacitance and maintaining aperture ratio.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The storage capacitor electrodes are nested within the existing transistor structure. The first storage capacitor electrode is formed in the same layer as the gate electrode, and the second storage capacitor electrode is formed on the gate insulation layer, creating a nested configuration that maximizes space utilization without increasing the overall device footprint.

Inventive Principle:

Principle #7Nested doll (Nesting)

2Reliability

If the thickness of the gate insulation layer is decreased to increase capacitance, then the capacitance of the storage capacitor increases, but the manufacturing precision requirements increase

Engineering Contradiction:

Improvecapacitance of storage capacitorVSAvoidthickness control of gate insulation layer

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

Instead of changing the thickness parameter of the gate insulation layer, the patent changes the area parameter by forming the second storage capacitor electrode on top of the gate insulation layer. This parameter substitution approach achieves capacitance enhancement while avoiding the manufacturing precision challenges associated with thinning the gate insulation layer.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS7838879B2Array substrate having enhanced aperture ratio, method of manufacturing the same and display device having the same

Publication Date: 2010.11.23 SAMSUNG DISPLAY CO LTD

AI summary

An array substrate includes a substrate, a thin film transistor, a passivation layer, a pixel electrode and a storage capacitor. The thin film transistor includes a gate electrode formed on the substrate, a gate insulation layer formed on the substrate having the gate electrode, a semiconductor layer formed on the gate insulation layer and a data electrode formed on the semiconductor layer. The passivation layer is formed on the substrate having the data electrode and the pixel electrode is electrically connected to the data electrode through a contact hole formed through the passivation layer. The storage capacitor includes a first storage capacitor electrode that is spaced apart from the gate electrode of the thin film transistor and a second storage capacitor electrode that is formed on the gate insulation and including a same material as the pixel electrode.