Array Substrate Test Switch Isolation for OLED Panel Testing

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Solution Overview

Problem

Conventional OLED panels face issues where electrical signals in the cell test circuit are affected by the array test circuit, leading to decreased display performance and increased testing costs due to the need for probes at different intervals during production line tests.

Innovation Solution

An array substrate design featuring a fan-out region with first signal lines extending to an array test region, where array test pads are connected through test switches to dummy pads, allowing for isolation during cell tests by sending high or low-level signals to control the test switches, preventing interference from the array test circuit.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the array test circuit is used during cell testing, then the testing process can be simplified, but the electrical signal is affected leading to decreased display performance

Engineering Contradiction:
Improvetesting process complexityVSAvoiddisplay performance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The substrate is divided into distinct functional regions: array test region, cell test region, and fan-out region. The array test pads and cell test pads are spatially separated and independently controlled through test switches, allowing separate testing operations without mutual interference. This segmentation enables the array test circuit to be isolated during cell testing, resolving the contradiction between simplified testing and reliable display performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Test switches are introduced to dynamically control the electrical connection states of array test pads and cell test pads. During cell testing, the test switches electrically disconnect the array test pads from the first signal lines, while during array testing, the cell test pads are disconnected. This dynamic switching mechanism allows the system to adapt its configuration based on the testing mode, preventing signal interference and ensuring reliable display performance while maintaining testing flexibility.

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If probes at different intervals are arranged for testing, then both array testing and cell testing can be performed, but the testing setup becomes more complex and costly

Engineering Contradiction:
Improvetesting capabilityVSAvoidprobe arrangement complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The test pads are arranged in a unified grid pattern with consistent spacing across the array test region and cell test region. This universal spacing allows a single set of probes with fixed intervals to perform both array testing and cell testing functions. The test switches provide the adaptability to selectively connect different pads to different signal lines, enabling one probe configuration to serve multiple testing purposes, thereby reducing probe arrangement complexity while maintaining versatile testing capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If the array test pads are always connected to signal lines, then array testing can be performed, but cell testing is interfered with

Engineering Contradiction:
Improvearray testing efficiencyVSAvoidcell test accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Test switches are positioned between the array test pads and the first signal lines to dynamically control their electrical connection. During array testing, the test switches are activated to connect array test pads to signal lines, enabling efficient array testing. During cell testing, the test switches are deactivated to disconnect array test pads from signal lines, preventing interference with cell test accuracy. This dynamic control mechanism allows the system to switch between testing modes without compromising either array testing efficiency or cell test accuracy.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11222828B1Array substrate and display panel
Publication Date: 2022.01.11 WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO LTD
  • US11222828B1 patent drawing

AI summary

The present invention provides an array substrate and a display panel. The array substrate includes a fan-out region, an array test region having multiple array test pads and multiple test switches, and a cell test region having multiple cell test pads and a dummy pad. A control end of each test switch is connected to the dummy pad, and the array test pads are connected to the first signal lines through the test switches. According to a high-level signal or a low-level signal received by the dummy pad, the test switch is turned on or off to conduct an array test or a cell test.