Array Substrate Stepped Channel Structure for TFT Leakage Control

The patent introduces a multi-layer stacked structure where the active layer comprises a first active layer and a second active layer stacked at the same position. This vertical stacking approach transforms the traditional planar structure into a three-dimensional configuration, increasing the effective channel width without extending the channel length horizontally. The stacked arrangement allows current to flow through multiple parallel channels, thereby increasing on-state current while maintaining the benefits of the lightly doped drain and raised source-drain structures for reliability.

The stacked multi-layer structure increases the total off-state leakage current path length vertically, effectively reducing the leakage current density through each individual layer. By distributing the leakage current across multiple stacked layers, the overall leakage performance is improved while maintaining the reliability benefits of the raised source-drain structure.

Instead of increasing channel length horizontally to reduce leakage, the patent stacks multiple active layers vertically, effectively increasing the channel width in the vertical dimension. This approach reduces leakage current density without increasing the horizontal channel length, thereby maintaining high on-state current. The stacked structure allows independent optimization of channel length for leakage control while using vertical stacking to enhance current carrying capacity.