Array Substrate Third Electrode Layer Aperture Ratio
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Solution Overview
Problem
Existing array substrates face issues with aperture ratio and power consumption due to the need for longer drain lengths and deep, wide contacting vias, which can lead to light leaks and pixel electrode disconnection.
Innovation Solution
The array substrate design includes a third electrode layer connected to the drain and extending onto the light filtering layer, with a contacting via penetrating through the planarization layer to connect the pixel electrode, reducing the need for extended drain lengths and minimizing the depth and opening width of the via, thus improving the aperture ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the drain is lengthened to avoid light leak at the contacting via, then light leak is prevented, but the aperture ratio decreases and power consumption increases
Solution Approach 1:
The patent introduces a third electrode layer that extends onto the light filtering layer, creating a new spatial dimension for electrical connection. This allows the contacting via to be shallower and narrower by utilizing the vertical stacking of electrode layers rather than extending the drain horizontally, thus preventing light leak without sacrificing aperture ratio.
Solution Approach 2:
The third electrode layer acts as an intermediary between the drain and the pixel electrode. It provides an additional conductive path that enables the pixel electrode to be connected to the drain through a shallower via, eliminating the need to lengthen the drain and thereby maintaining high aperture ratio while preventing light leak.
2Object-affected harmful factors
If the drain is lengthened to avoid light leak at the contacting via, then light leak is prevented, but power consumption increases
Solution Approach 1:
By extending the third electrode layer onto the light filtering layer, the patent creates a vertical conductive path that shortens the effective resistance path. This reduces the power consumption compared to lengthening the drain horizontally, while still effectively preventing light leak through the narrower via opening.
3Reliability
If a deep contacting via is used to connect the pixel electrode to the drain, then electrical connection is achieved, but the aperture ratio is further affected and disconnection risk increases
Solution Approach 1:
The patent segments the electrical connection path into multiple layers: the third electrode layer extends onto the light filtering layer, and the contacting via connects through a reduced depth to this extended electrode. This segmentation allows the via to be shallower and narrower, improving aperture ratio while maintaining reliable electrical connection through the multi-layer structure.
Solution Approach 2:
The third electrode layer extending onto the light filtering layer creates additional vertical space for connection. This dimensional change allows the contacting via to access the electrode at a shallower depth with a narrower opening, thereby improving aperture ratio while ensuring reliable electrical connection.
4Reliability
If a deep contacting via with large opening is used, then electrical connection is achieved, but the aperture ratio of the COA array substrate is further affected
Solution Approach 1:
The third electrode layer extending onto the light filtering layer provides an additional vertical dimension for connection. This allows the contacting via to be positioned and sized optimally, with a narrower opening that minimizes aperture ratio impact while maintaining reliable electrical connection to the extended electrode layer.
Data Source
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AI summary
The present invention provides an array substrate, a manufacturing method thereof and a display device, relates to the field of liquid crystal display technology, and can solve the problem of low aperture ratio of the existing array substrate. The array substrate of the present invention comprises: a light filtering layer provided on a substrate a thin film transistor formed thereon, a planarization layer covering the light filtering layer, and a pixel electrode provided above the planarization layer, the array substrate further comprises: a third electrode layer connected to a drain of the thin film transistor and extending onto the light filtering layer; and a contacting via penetrating through the planarization layer and provided above a portion of the third electrode layer on the light filtering layer, the pixel electrode being connected to the third electrode layer through the contacting via.