Array Substrate Touch Electrode Layering for High PPI Displays
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Solution Overview
Problem
Current Full in Cell (FIC) touch-control liquid crystal display panels face challenges with insufficient opening rate as the number of pixels increases, leading to potential signal transmission issues and short circuits between touch-control electrode wirings and data lines.
Innovation Solution
The array substrate design includes touch-control electrode wirings that overlap with gate lines on a different layer, featuring a dual-layer structure with metal and conductive protection materials, and are connected to touch-control electrodes through via holes in insulating layers, reducing the area occupied by signal lines and minimizing the likelihood of short circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If touch-control electrode wirings are arranged on the same layer as data lines, then routing is simplified, but short circuits between touch-control electrode wirings and data lines occur
Solution Approach 1:
The patent resolves the contradiction by moving the touch-control electrode wirings from the same layer as data lines to a different layer (either above or below). This dimensional separation in the vertical direction eliminates the short circuit risk while maintaining routing simplicity, as the wirings can still be arranged in corresponding positions without complex lateral routing changes.
Solution Approach 2:
The patent applies segmentation by separating the touch-control electrode wirings and data lines into different physical layers. This layering strategy divides the conductor space vertically, allowing both types of conductors to coexist without electrical interference while maintaining their respective functional layouts.
2Manufacturing precision
If the number of pixels is increased, then display resolution is improved, but the opening rate becomes insufficient
Solution Approach 1:
The patent addresses this contradiction by utilizing the vertical dimension through multi-layer conductor arrangement. By placing touch-control electrode wirings on a different layer from data lines and gate lines, the horizontal space in each layer can be optimized for higher pixel density without being constrained by planar routing requirements, thereby improving opening rate while maintaining high resolution.
Solution Approach 2:
The patent applies multi-functionality by designing the array substrate to simultaneously support high pixel density and high opening rate through its multi-layer structure. The different layers serve multiple functions: one layer carries data lines for pixel control, another layer carries touch-control electrode wirings for touch sensing, and both can be optimized independently to achieve high resolution and high opening rate concurrently.
3Reliability
If touch-control electrode wirings are placed on a different layer from gate lines, then short circuit risk is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent resolves this contradiction by using vertical layering to separate touch-control electrode wirings from gate lines. This approach prevents short circuits through spatial separation while managing manufacturing complexity through systematic layer design, where each layer's conductor patterns are optimized for its specific function without requiring complex inter-layer routing.
Solution Approach 2:
The patent applies merging by combining the touch-control electrode wiring layer with the display conductor layers in a unified multi-layer structure. This integration allows the touch-control functionality to be added without creating a completely separate manufacturing process, as the same layering and patterning techniques used for display conductors are also applied to touch-control conductors.
Data Source
AI summary
The present disclosure relates to the technical field of display. Disclosed are an array substrate and a preparation method therefor, and a display panel and a display device. The array substrate includes: a substrate; multiple gate lines, wherein the gate lines are located on the substrate, and extend along a first direction; multiple data lines, wherein the data lines are located on the substrate, and extend along a second direction, and the gate lines and the data lines intersect to define multiple pixel areas; and a touch-control electrode wiring wherein the touch-control electrode wiring has the same direction as that of the gate lines, and is arranged insulated from the gate lines on a different layer, and the orthographic projection of the touch-control electrode wiring on the substrate at least has an overlapping area with the orthographic projection of part of the gate lines on the substrate.