Array Substrate Pin Layout to Prevent LCD Touch Tear Film
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Liquid crystal displays (LCDs) with integrated touch functions are prone to a 'twill defect' known as a tear film, caused by corrosion and curling phenomena during the manufacturing process, particularly due to redox reactions between metal layers in the touch structure.
Innovation Solution
The array substrate design includes a base with a display area and a bonding area, featuring conductive pins and electrodes in specific layers to prevent overlap and corrosion, with conductive electrodes directly on the pins and a planarization layer that does not cover the pins, ensuring no overlap and reducing the risk of corrosion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If metal layers are stacked in the touch structure during manufacturing, then the touch function is achieved, but redox reactions occur between metal layers causing corrosion and curling (twill defect)
Solution Approach 1:
The patent extracts the problematic overlapping metal layer structure and replaces it with a planarization layer that does not cover the conductive pins. This removes the source of redox reactions while preserving the touch function through alternative structural arrangements.
Solution Approach 2:
The patent introduces an planarization layer as an intermediary between the conductive pins and upper structures. This intermediary layer prevents direct contact between reactive metal layers, eliminating redox reactions while maintaining electrical connectivity and touch functionality.
2Shape
If conductive pins are covered by planarization layer, then planarity is improved, but corrosion risk increases due to overlap with metal layers
Solution Approach 1:
The patent applies different properties to different regions: the planarization layer is applied locally only in areas where it does not overlap with conductive pins. This localized application maintains planarity in non-critical areas while avoiding corrosion risks in critical pin regions.
Solution Approach 2:
The patent segments the planarization layer application into distinct regions - areas with conductive pins remain uncovered while other areas receive the planarization treatment. This segmentation allows simultaneous achievement of planarity where needed and corrosion prevention where critical.
3Ease of operation
If multiple metal layers are used for touch structure, then touch sensitivity is improved, but manufacturing complexity increases due to layer alignment and corrosion prevention
Solution Approach 1:
The patent extracts the problematic multi-layer overlapping structure and replaces it with a simplified configuration where the planarization layer is selectively removed from pin areas. This reduces manufacturing complexity by eliminating precise alignment requirements while maintaining touch sensitivity through preserved conductive pathways.
Data Source
AI summary
An array substrate has a display area and a bonding area located on a side of the display area. The array substrate includes a base, a plurality of first transistors, a plurality of conductive pins and a plurality of conductive electrodes. The plurality of first transistors are disposed on a side of the base and located in the display area; a first transistor includes a first gate, a first source and a first drain. The plurality of conductive pins are disposed on the side of the base and located in the bonding area, and are disposed in a same layer as the first gate. The plurality of conductive electrodes are each disposed on a respective one of surfaces of the plurality of conductive pins away from the base.