Array Substrate Electrode Layout Without Via Holes

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Solution Overview

Problem

The high manufacturing cost of indium gallium zinc oxide displays due to the large number of photomasks required in their production.

Innovation Solution

The array substrate manufacturing method involves forming a first electrode on the surface of the insulating layer away from the substrate, with the active layer overlapping the gate, and a second metal layer comprising electrodes at intervals, allowing connection without via holes, thereby reducing the number of photomasks needed for forming via holes and overall photomasks required.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a conventional manufacturing process with multiple via holes is used to connect electrodes and active layers, then electrical connectivity is achieved, but the number of photomasks required increases, leading to higher manufacturing cost

Engineering Contradiction:
Improvemanufacturing costVSAvoidnumber of photomasks
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the via hole formation step from the manufacturing process. By directly forming the second electrode on the insulating layer without requiring via holes to penetrate through the insulating layer, the process removes the need for additional photomasks that would be required to define via hole patterns, thereby reducing manufacturing complexity and cost

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the dimensional approach by forming the second electrode in a different spatial arrangement. Instead of creating vertical connections through via holes penetrating the insulating layer, the second electrode is formed on the surface of the insulating layer, changing the connection topology and eliminating the need for through-layer via formation

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If multiple photomasks are used to form via holes and electrodes, then precise electrical connections are achieved, but the manufacturing process becomes more complex and costly

Engineering Contradiction:
Improvevia hole alignmentVSAvoidnumber of photomasks
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent extracts the via hole formation step from the process, eliminating the need for photomasks that would be required to define via hole patterns and their alignment with underlying structures. This directly reduces the number of photomasks while maintaining electrical connectivity

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The insulating layer is formed with a surface that directly receives the second electrode without requiring preliminary via hole formation. This preliminary preparation of the insulating layer surface eliminates the need for subsequent via hole etching and alignment steps

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20240355840A1Array substrate and manufacturing method thereof, and display panel
Publication Date: 2024.10.24 GUANGZHOU CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD
  • US20240355840A1 patent drawing
  • US20240355840A1 patent drawing
  • US20240355840A1 patent drawing

AI summary

An array substrate includes a substrate, a first metal layer, a first insulating layer, an active layer, a first electrode, a second metal layer, a second insulating layer, and a second electrode. The first insulating layer covers the first metal layer. The active layer on the first insulating layer and overlaps a gate of the first metal layer. The first electrode on the first insulating layer is spaced apart from the active layer. A portion of the second metal layer is located on the active layer. The second metal layer includes a first metal electrode connected to the active layer and a second metal electrode which is separated from the first metal electrode, and connected to the active layer and the first electrode. The second insulating layer covers the second metal layer, the first electrode, and the active layer. The second electrode is disposed on the second insulating layer.