Array Substrate Via-Hole Design for Even Orientation Liquid Diffusion
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Poor coating of the orientation film on array substrates for liquid crystal display panels leads to reduced yield and degraded picture quality due to uneven diffusion of orientation liquid around connection via-holes, especially when an organic insulating layer with a thickness greater than 2 microns is used.
Innovation Solution
The method involves forming a groove structure on the electrode layer that communicates with the connection via-hole, guiding the orientation liquid to diffuse evenly into the via-hole, thereby improving the coating uniformity and preventing accumulation at the edge of the via-hole.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an organic insulating layer with thickness greater than 2 microns is used, then electrical insulation performance is improved, but orientation liquid diffusion becomes uneven and coating quality deteriorates
Solution Approach 1:
The connection via-hole is segmented into different depth zones, with the first depth zone having a larger cross-sectional area than the second depth zone. This segmentation allows orientation liquid to diffuse properly through the thick organic insulating layer without accumulating at the via-hole edge, resolving the contradiction between maintaining thick insulation and achieving uniform coating.
Solution Approach 2:
The via-hole structure is given non-uniform local quality by varying its cross-sectional area at different depths. The upper portion (first depth zone) has a larger area to facilitate orientation liquid entry, while the lower portion (second depth zone) has a smaller area to prevent accumulation, enabling both thick insulation and uniform coating quality.
2Ease of manufacture
If the connection via-hole has uniform cross-sectional area, then manufacturing simplicity is maintained, but orientation liquid accumulates at the via-hole edge causing poor coating
Solution Approach 1:
The via-hole is divided into two depth zones with different cross-sectional areas. This segmentation can be achieved through controlled etching processes that create the tapered profile in a single step, maintaining manufacturing simplicity while eliminating orientation liquid accumulation and ensuring uniform coating.
Solution Approach 2:
The cross-sectional area parameter of the via-hole is changed with depth, creating a tapered structure. This parameter variation is implemented through standard semiconductor fabrication techniques, preserving ease of manufacture while solving the coating uniformity problem.
3Ease of operation
If the via-hole cross-sectional area is large throughout, then orientation liquid can easily enter, but accumulation at the edge occurs degrading picture quality
Solution Approach 1:
The via-hole is segmented into an upper zone with larger cross-sectional area for easy orientation liquid entry, and a lower zone with smaller cross-sectional area to prevent accumulation. This segmented structure maintains ease of operation for liquid infiltration while ensuring high picture quality through uniform coating.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the yield of array substrates and improves the picture quality by ensuring uniform diffusion of the orientation liquid, reducing defects such as mura in the display panel.
Implementation Method 1
guiding the orientation liquid to diffuse evenly into the via-hole
Data Source
Figure 1
Figure 2
Figure 3
AI summary
An array substrate and a preparation method therefor, and a display panel, which belong to the technical field of display. The preparation method for an array substrate comprises: providing a base substrate (100); forming a driving circuit layer (200) on the base substrate (100), wherein the driving circuit layer (200) comprises a switching transistor (210); forming an insulating material layer (300) on the side of the driving circuit layer (200) that is away from the base substrate (100), wherein the insulating material layer (300) has a connection via hole (310) that exposes at least part of the region of a drain electrode (220) of the switching transistor (210); and forming an electrode layer (400) on the side of the insulating material layer (300) that is away from the base substrate (100), wherein the surface of the electrode layer (400) that is away from the base substrate (100) has a groove structure (401) that extends to the connection via hole (310). The preparation method can prevent coating defects from occurring when an alignment layer (500) is formed.