Array Substrate Via Hole Extraction for Touch Display Streaks
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Solution Overview
Problem
In-cell mutual capacitive touch technology in touch display devices faces issues with poor waterproof properties, low report rates, and high costs due to the need for separate drive circuits, and visible streaks caused by high-density via holes in self-capacitive touch technology.
Innovation Solution
An array substrate design featuring a common electrode layer divided into self-capacitive electrodes connected to a drive circuit through touch leads, with at least one continuous touch lead passing through a column of electrodes and via holes spaced to cover multiple pixel units, reducing the number and density of via holes to minimize visible streaks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If via holes are used to connect touch leads to touch electrodes in in-cell self-capacitive touch technology, then electrical connection is achieved, but visible streaks appear in screen display
Solution Approach 1:
The patent extracts and removes the via holes from the display area to eliminate the harmful visual streaks. By routing touch leads through the side edges of the array substrate rather than through via holes in the display area, the harmful visual defect is completely removed while maintaining the necessary electrical connection function.
Solution Approach 2:
The patent introduces an intermediary routing path along the side edges of the array substrate as a mediator between the touch electrodes and drive circuit. This intermediary path allows electrical connection to be maintained without directly placing via holes in the display area, thus resolving the contradiction between connection reliability and visual quality.
2Adaptability or versatility
If separate drive circuits are used for display panel and touch panel electrodes in in-cell mutual capacitive touch technology, then functional independence is achieved, but device cost increases
Solution Approach 1:
The patent merges the drive circuit functions into a single integrated circuit located in the array substrate, combining both display panel and touch panel drive functions. This consolidation eliminates the need for separate drive circuits, reduces device complexity and cost, while maintaining functional independence through proper signal routing and electrode design.
Solution Approach 2:
The patent creates a universal drive circuit that serves multiple functions - controlling both display panel electrodes and touch panel electrodes through the same integrated circuit. This multi-functional approach allows a single circuit to replace what would traditionally require separate circuits, thereby reducing cost while maintaining adaptability.
3Reliability
If via holes are densely distributed to connect all touch electrodes, then electrical connection coverage is improved, but visible streaks and manufacturing complexity increase
Solution Approach 1:
The patent extracts the via holes from the display area and relocates them to the side edges. This extraction reduces the density of via holes in the critical display region, thereby reducing manufacturing complexity and avoiding visible streaks, while still maintaining complete electrical connection coverage through the edge routing paths.
Solution Approach 2:
The patent changes the spatial dimension of via hole placement from the display area (2D plane) to the side edges (peripheral dimension). This dimensional relocation allows all necessary electrical connections to be made without densely distributing via holes across the display area, thus reducing manufacturing complexity while maintaining connection coverage.
Data Source
AI summary
The present disclosure provides a touch display panel including an array substrate, a color filter substrate and a plurality of photo spacers. The array substrate includes pixel units, a drive circuit, touch leads, and a common electrode layer. The common electrode layer is divided into columns of self-capacitive electrodes. Each touch lead is disposed parallel to and connected with one of the columns through at least two first via holes. An interval between adjacent first via holes is greater than or equal to twice the side length of one pixel unit. The first via holes connected with one touch lead are aligned staggered to those connected with an adjacent touch lead and none of the photo spacers overlap the first via holes in the direction perpendicular to the array substrate.