Array Substrate With Insulating Planarization Layer Vias
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Solution Overview
Problem
In touch display panels, the large capacitance between the common electrode and the thin film transistor source during the display phase leads to increased power consumption, and the sputtering process for forming touch electrodes can contaminate the insulating planarization layer, making the manufacturing process cumbersome and costly.
Innovation Solution
The array substrate design includes an insulating planarization layer with vias exposing the drain of each thin film transistor, reducing the capacitance between the common electrode and the thin film transistor source, and avoiding the formation of touch electrodes on the insulating planarization layer to prevent contamination, with a manufacturing method that simplifies the process by eliminating the need for additional masks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the pixel electrode is located at a side of the common electrode facing away from the thin film transistors, then the display function is achieved, but a large capacitance is generated between the common electrode and the source electrode, increasing power consumption
Solution Approach 1:
The patent repositions the pixel electrode from a planar arrangement to a three-dimensional stacked arrangement, placing it on the opposite side of the common electrode relative to the thin film transistor. This spatial reconfiguration in the vertical dimension reduces the overlapping area and distance between the common electrode and source electrode, thereby reducing parasitic capacitance and power consumption while maintaining display functionality
Solution Approach 2:
The patent introduces an insulating planarization layer as an intermediary between the thin film transistor and the pixel electrode. This intermediate layer acts as a dielectric barrier that reduces the electric field coupling between the source electrode and common electrode, thereby reducing parasitic capacitance without interfering with the display function
2Reliability
If the touch electrode is formed on the insulating planarization layer by sputtering process, then the touch function is achieved, but the insulating planarization layer is decomposed and contaminates the sputtering chamber
Solution Approach 1:
The patent forms a protective inorganic insulating layer on the insulating planarization layer before the sputtering process. This preliminary protective layer prevents the high-temperature sputtering process from decomposing the organic insulating planarization layer, thereby preventing contamination of the sputtering chamber while allowing the touch electrode to be formed
Solution Approach 2:
The patent introduces an inorganic insulating layer as an intermediary protective barrier between the sputtering process and the organic insulating planarization layer. This intermediate layer withstands the sputtering conditions without decomposing, protecting the underlying organic layer from thermal decomposition and contamination
3Reliability
If additional masks and protective layers are added to prevent contamination, then the insulating planarization layer is protected, but the manufacturing process becomes cumbersome and costly
Solution Approach 1:
The patent combines the planarization function and the protective function into a single integrated structure. The insulating planarization layer serves both as a surface-flattening layer for subsequent processing and as a protective layer that prevents contamination during sputtering, eliminating the need for separate protective masks and simplifying the manufacturing process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces power consumption by minimizing the voltage required for the common electrode and simplifies the manufacturing process by avoiding contamination and the need for protective layers, while enabling a thinner and lighter touch display panel.
Implementation Method 1
the touch electrode is generally made of a metal material, and the touch electrode is usually formed by a sputtering process
Data Source
AI summary
The present disclosure relates to the field of touch display technologies, and provides an array substrate, a manufacturing method thereof, a touch display panel and a touch display device. The array substrate includes a base substrate, and a plurality of thin film transistors, an insulating planarization layer, a plurality of pixel electrodes, a plurality of touch electrodes and a plurality of common electrodes formed sequentially on the base substrate. The insulating planarization layer has a plurality of vias exposing a drain of each thin film transistor respectively. Each pixel electrode is connected to a drain of a corresponding thin film transistor through a via in the insulating planarization layer, and each common electrode is connected to a corresponding touch electrode.