Array Substrate Layout With Virtual Signal Line for Narrow Bezels

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing display technologies face challenges in achieving ultra-narrow bezels while ensuring etching uniformity and effective electrostatic protection for display panels.

Innovation Solution

The array substrate design includes a driver module with multiple stages of driving circuits arranged along a first direction, featuring a first data line between adjacent driving circuits and a floating virtual signal line, along with an electrostatic discharge circuit for protecting clock and control voltage lines, and a virtual driving circuit region with disconnected virtual input and output ends, all arranged in a peripheral region surrounding the display area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If driver module is arranged at upper side or lower side of array substrate to achieve narrow bezel, then bezel width is reduced, but etching uniformity deteriorates

Engineering Contradiction:
Improvebezel widthVSAvoidetching uniformity
Core Design Contradiction:
Length of moving objectVSManufacturing precision

Solution Approach 1:

The patent introduces a virtual signal line extending in the second direction (perpendicular to the first direction) to create a multi-dimensional layout. This virtual signal line, together with the first data line extending in the first direction, forms a grid-like structure that divides the peripheral region into multiple zones. This dimensional approach allows the driver module to be positioned at the edge while maintaining adequate spacing and etching uniformity across the substrate, thus achieving narrow bezel without compromising manufacturing precision.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If driver module with multiple stages of driving circuits is arranged along first direction, then circuit integration is improved, but space occupation increases

Engineering Contradiction:
Improvecircuit integrationVSAvoidspace occupation
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent employs a nested arrangement where the first data line and virtual signal line are positioned between adjacent driving circuits in the driver module. This nested configuration allows the signal lines to be integrated within the spaces between circuit stages, maximizing space utilization. The first data line extends in the first direction while the virtual signal line extends in the second direction, creating an efficient two-dimensional layout that reduces overall space occupation while maintaining high circuit integration.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Reliability

If first data line is arranged between adjacent driving circuits to provide data voltage, then signal transmission is improved, but electrostatic protection becomes more difficult

Engineering Contradiction:
Improvesignal transmissionVSAvoidelectrostatic protection
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a virtual signal line as an intermediary element between the first data line and the driving circuits. This virtual signal line, being in a floating state, acts as a mediator that helps distribute and balance electrical potentials in the peripheral region. By positioning both the first data line and virtual signal line between adjacent driving circuits, the patent creates multiple pathways for signal transmission while also providing additional electrostatic protection, as the virtual signal line can serve as an additional reference or protection layer against electrostatic discharge.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20260033004A1Array substrate and display device
Publication Date: 2026.01.29 HEFEI BOE DISPLAY TECH CO LTD
  • US20260033004A1 patent drawing
  • US20260033004A1 patent drawing
  • US20260033004A1 patent drawing

AI summary

An array substrate and a display device are provided. An array substrate includes a base substrate, a first data line, a virtual signal line and a driver module, wherein the first data line, the virtual signal line and the driver module are arranged on the base substrate, the driver module includes a multi-stage driving circuit; the multi-stage driving circuit is arranged along the first direction; the driving circuit is used to provide a driving signal; the first data line is arranged between at least two adjacent driving circuits, and the first data line is used to provide a data voltage; the virtual signal line is further arranged between at least two adjacent driving circuits; the virtual signal line is in a floating state. In the embodiments of the present disclosure, the virtual signal line is provided to ensure etching uniformity.