Array Substrate Wiring Pattern for Photoresist Uniformity
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Solution Overview
Problem
During the manufacturing of thin film transistor (TFT) arrays on display devices, the photoresist coating process often results in non-uniform thickness due to accumulation at V-shaped corners during spin coating, leading to defects like Track Mura.
Innovation Solution
Incorporating a second wiring with V-shaped corners oriented oppositely to the first wiring at these corners, which guides the photoresist to be uniformly distributed by preventing accumulation and ensuring even coating, thereby improving the uniformity of the photoresist thickness across the substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photoresist is coated during spin coating process, then the substrate surface is covered with photoresist layer, but the photoresist thickness becomes non-uniform due to accumulation at V-shaped corners
Solution Approach 1:
The patent applies preliminary anti-action by designing the second wiring pattern with V-shaped corners oriented opposite to the first wiring's V-shaped corners. This opposite orientation creates a counter-effect that prevents photoresist from accumulating at the first wiring's V-shaped corners during spin coating, thereby maintaining uniform photoresist thickness across the substrate surface.
Solution Approach 2:
The patent implements inversion by orienting the V-shaped corners of the second wiring in the opposite direction to those of the first wiring. Specifically, when the first wiring's V-shaped corner salient points toward the display area, the second wiring's V-shaped corner salient points away from the display area. This inverted configuration guides photoresist flow to disperse rather than accumulate, solving the uniformity problem.
2Reliability
If V-shaped corner wirings are used for signal transmission, then electrical connection is achieved, but photoresist accumulation occurs leading to Track Mura defects
Solution Approach 1:
The patent merges multiple functions into the second wiring: it serves as both a signal transmission conduit (like the first wiring) and a photoresist flow control structure. By incorporating V-shaped corners with opposite orientation, the second wiring simultaneously performs electrical connection and prevents photoresist accumulation, thereby eliminating Track Mura defects while maintaining signal transmission reliability.
Solution Approach 2:
The second wiring is designed with multi-functionality, serving dual purposes: (1) transmitting electrical signals to the driver integrated circuit, and (2) controlling photoresist flow during spin coating to prevent accumulation. This universal design allows a single structure to address both electrical functionality and coating uniformity, preventing Track Mura defects.
3Ease of manufacture
If spin coating is performed to coat photoresist, then the substrate is covered with photoresist layer, but non-uniform thickness distribution occurs
Solution Approach 1:
The patent applies self-service by designing the wiring pattern itself to control photoresist flow during spin coating. The V-shaped corners of the second wiring automatically guide and disperse photoresist without requiring additional external tools or processes. The wiring structure serves its own function of controlling coating uniformity, making the spin coating process effective and producing uniform photoresist thickness distribution.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively prevents excessive photoresist accumulation and non-uniform coating, reducing defects such as Track Mura and enhancing the quality of the formed wiring by ensuring uniform photoresist distribution during the spin coating process.
Implementation Method 1
During processes of manufacturing a thin film transistor (TFT) array on an array substrate of a display device, particularly during coating photoresist in a spin coating step of a photolithography process
Data Source
AI summary
There are provided an array substrate, a display panel and a display device. The array substrate includes a display area and a non-display area. The non-display area include: at least one first wiring configured to be connected with a signal line within the display area and with a driver integrated circuit disposed within the non-display area; and at least one second wiring configured to cause photoresist to be uniformly distributed during a spin coating process of the photoresist.


