Array Substrate Via Group Layout for Narrow-Bezel Signal Routing
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Solution Overview
Problem
The increased number of signal lines required for high refresh rates in display panels using gate driving circuits on array substrates leads to difficulty in reducing the width of wiring segments and the boundary width of the array substrate, complicating the signal transfer process.
Innovation Solution
The array substrate design includes a first wiring layer, a second wiring layer, an insulating layer, and a transfer layer, with via hole groups arranged alternately to connect line segments, reducing the total width of the first and second line segments and enhancing contact areas, thereby narrowing the boundary width.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If signal lines are arranged in multiple columns to handle high refresh rates, then signal transfer capability is improved, but wiring segment width cannot be reduced and array substrate boundary width increases
Solution Approach 1:
The patent transitions from a planar single-layer wiring arrangement to a three-dimensional multi-layer structure. Signal lines are distributed across multiple wiring layers (first wiring layer, second wiring layer, third wiring layer) with vertical connections via via holes. This dimensional change allows signal lines to be arranged in space rather than confined to a single plane, enabling high refresh rate signal transfer while reducing the horizontal width of individual wiring segments and the overall array substrate boundary.
2Reliability
If multiple via hole columns are used for signal transfer, then connection reliability is improved, but manufacturing complexity increases
Solution Approach 1:
The patent merges multiple via hole columns into integrated via hole groups where multiple via holes are arranged in close proximity and connected to multiple line segments. The via hole groups combine first via holes connecting to first line segments, second via holes connecting to second line segments, and third via holes connecting to third line segments. This merging approach maintains connection reliability through multiple parallel connection paths while simplifying manufacturing by treating the via hole group as a single integrated structure rather than separate via columns.
Solution Approach 2:
The via hole groups serve multiple functions simultaneously: they provide electrical connections between different wiring layers, act as structural support elements, and enable signal distribution to multiple line segments. The same via hole group structure handles connections for first line segments, second line segments, and third line segments, making the structure universal and multi-functional, thereby improving reliability without proportionally increasing manufacturing complexity.
Data Source
AI summary
Array substrates and display panels are provided. The array substrate includes a first wiring layer including first line segments each extending along a first direction, a second wiring layer including second line segments, an insulating layer covering the first and second line segments, and a transfer layer including transfer parts each extending along the first direction. Each second line segment includes a first connecting part extending along the first direction. The insulating layer includes first via hole groups each including at least one first via hole and second via hole groups each including at least one second via hole. The first line segment and the transfer part are connected at the first via hole. The first connecting part and the transfer part are connected at the second via hole. The first via hole groups and the second via hole groups are alternately arranged along the first direction.