Arrayed Switch Circuit for Reconfigurable Chip Package Routing
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Solution Overview
Problem
Conventional system chip packages require redesign of the redistribution layer (RDL) if modifications are needed after packaging, leading to increased product development time and research and development costs, as well as reduced willingness from assembly houses to accept orders with less output.
Innovation Solution
An arrayed switch circuit with signal conductive pads, row and column signal switches, and a through silicon via layer, allowing for dynamic reconfiguration of chip connections without altering the redistribution layer, utilizing transistors and inverters to control signal and power paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the redistribution layer (RDL) is customized by the assembly house for chip connections, then the chip connections can be established, but if modifications are needed after packaging, the RDL must be redesigned which increases product development time and research and development costs
Solution Approach 1:
The patent applies the dynamics principle by replacing the static RDL routing with a dynamic switch circuit that can be reconfigured after packaging. The switch circuit includes multiple switches (first switch, second switch, third switch, fourth switch) that can dynamically change connection paths between chips and I/O pins, allowing modification of chip connections without redesigning the physical RDL structure.
Solution Approach 2:
The patent segments the connection function from the physical RDL structure by introducing a separate switch circuit layer. This segmentation allows the connection configuration to be independently modified through switch control signals without affecting the underlying RDL routing, thus enabling post-packaging modifications without time-consuming redesigns.
2Adaptability or versatility
If the redistribution layer (RDL) is customized by the assembly house for chip connections, then the chip connections can be established, but if modifications are needed after packaging, the RDL must be redesigned which increases research and development costs
Solution Approach 1:
The dynamic switch circuit enables connection reconfiguration without physical RDL redesign, eliminating the costly iterative redesign process. The switch circuit can be controlled through software or control signals, reducing the need for expensive manual RDL modifications and associated research and development costs.
Solution Approach 2:
The patent creates a functional copy of the RDL routing capability through the switch circuit, which replicates the connection functionality without requiring physical changes to the actual RDL structure. This virtual routing layer allows multiple connection configurations to be achieved without duplicating the expensive physical manufacturing process.
3Adaptability or versatility
If the redistribution layer (RDL) requires redesign for modification after packaging, then connection changes can be made, but the assembly house has low willingness to accept orders for products with less output
Solution Approach 1:
The dynamic switch circuit allows connection configurations to be changed without stopping the assembly line or requiring new RDL manufacturing. This maintains high productivity while providing the adaptability needed for small-batch or customized orders, making assembly houses more willing to accept diverse order volumes.
Solution Approach 2:
The switch circuit provides universal connection capabilities that can accommodate different chip configurations and I/O pin assignments within the same package. This multi-functionality allows the assembly house to handle various order types (high volume standard products and low volume customized products) using the same manufacturing infrastructure, increasing their willingness to accept diverse orders.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables efficient reconfiguration of chip connections, reducing product development time and costs by allowing modifications to chip and I/O pin connections without redesigning the redistribution layer, while improving signal transmission performance and flexibility.
Implementation Method 1
the transistor determines whether the drain terminal and the source terminal are in a conducting or a non-conducting state according to the voltage level of the control signal
Implementation Method 2
The first inverter has a first input terminal and a first output terminal, wherein the first input terminal is connected to the drain terminal. The second inverter has a second input terminal and a second output terminal, wherein the second input terminal is connected to the first output terminal
Data Source
AI summary
An arrayed switch circuit includes a substrate, signal conductive pads and signal expansion pins. The signal conductive pads are disposed on the substrate at intervals, and the signal conductive pads are arranged to form a signal conductive pad array. Each of the signal conductive pads has a row position and a column position in the signal conductive pad array. A row signal switch is provided between any two adjacent signal conductive pads corresponding to the same row position, and a column signal switch is provided between any two adjacent signal conductive pads corresponding to the same column position. The signal expansion pins are connected to the signal conductive pads located on at least one side of the signal conductive pad array through signal expansion switches respectively.