Programmable Arrayed Switch Circuitry for Flexible Chip Interconnects
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Solution Overview
Problem
Current system packaging requires redesigning wiring redistribution layers when testing or replacing chips, increasing research-and-development time and cost, and manufacturers are hesitant to take orders for low quantity demands.
Innovation Solution
An arrayed switch circuitry system with programmable connecting chips that integrate checkerboard and high-speed channel structures, allowing flexible wiring combinations without customizing redistribution layers, and a switching circuit with base voltage control for optimal signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If wiring redistribution layers are customized by the packaging factory, then connection between chips is achieved, but research-and-development time and cost increase when wiring needs to be modified
Solution Approach 1:
The patent implements a dynamic wiring configuration system where the wiring redistribution layer can be reconfigured through control signals. Switching elements (transistors) are controlled by row and column select signals to dynamically connect different pads, allowing the wiring pattern to change without physical redesign. This resolves the contradiction by making the wiring adaptable rather than static.
Solution Approach 2:
The patent changes the state parameters of the wiring system by using different control signal combinations (row select and column select signals) to alter the connection topology. By changing the electrical state of switching elements through voltage signals, the wiring configuration can be modified without changing the physical structure, thus reducing R&D time and cost.
2Ease of manufacture
If wiring redistribution layers are customized by the packaging factory, then connection between chips is achieved, but research-and-development cost increases when wiring needs to be modified
Solution Approach 1:
The patent creates a universal wiring redistribution layer that can serve multiple chip configurations through programmable switching elements. The same physical wiring layer can be reconfigured to connect different pad combinations, making it multi-functional. This eliminates the need for multiple customized wiring designs, thereby reducing R&D costs while maintaining ease of manufacture.
Solution Approach 2:
The dynamic reconfiguration capability allows a single wiring redistribution layer design to accommodate multiple chip connection scenarios. By controlling the switching elements with different signal patterns, the same hardware structure achieves different wiring outcomes, reducing the need for costly redesigns.
3Reliability
If all wiring redistribution layers are redesigned when chip configuration changes, then correct wiring is achieved, but productivity decreases
Solution Approach 1:
The patent enables the wiring redistribution layer to dynamically adapt to different chip configurations through control signals. When chip configuration changes, the system reconfigures the wiring by activating different switching elements rather than requiring complete redesign. This maintains wiring correctness while preserving production efficiency.
Solution Approach 2:
The wiring redistribution layer is pre-designed with multiple potential connection paths and switching elements that can be activated based on the specific chip configuration. This preliminary preparation allows rapid reconfiguration without time-consuming redesign, ensuring both reliability and productivity.
4Ease of manufacture
If packaging factory performs manufacturing with customized wiring, then chip connection is achieved, but adaptability decreases for low-demand products
Solution Approach 1:
The patent implements a dynamically reconfigurable wiring system that can adapt to different product demands. The same manufacturing process can produce different wiring configurations by changing control signals, providing high adaptability for low-demand or customized products without requiring separate manufacturing lines.
Solution Approach 2:
The wiring redistribution layer serves as a universal platform that can accommodate multiple product configurations. The switching elements allow the system to function in different modes, providing versatility for various product demands including low-volume production while maintaining ease of manufacture through a standardized process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Reduces research-and-development time and cost by enabling flexible wiring designs and improving signal transmission speed and efficiency, while avoiding redesigns and minimizing testing costs.
Implementation Method 1
a transmission gate having an input end, an output end, two gate control ends and two base control ends, and configured to make the input end and the output end conduct or not conduct with each other according to voltages of the two gate control ends
Implementation Method 2
a base voltage control sub-circuit connected to the input end and the two base control ends, and configured to adjust voltages of the two base control ends according to a voltage of the input end when the input end and the output end conduct with each other, for a voltage difference between the input end and the two base control ends to be smaller than a default value
Data Source
AI summary
An arrayed switch circuitry includes contact units each of which includes a pad, a first row channel provided with a first switching element, a first column channel connected to the first row channel and provided with a second switching element, a connecting channel connecting the pad to the first row channel or the first column channel, a second row channel connected with the pad through a third switching element and a second column channel connected with the pad through a fourth switching element. The first row channels with the same row position are connected to each other, and the second row channels with the same row position are connected to each other. The first column channels with the same column position are connected to each other, and the second column channels with the same column position are connected to each other.


