Substrate-Embedded Arrow Waveguide for SOI Integration

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Solution Overview

Problem

The integration of optical and electronic devices on the same semiconductor-on-insulator (SOI) chip is challenging due to limitations in the core dimensions of optical waveguides, which restrict the cut-off wavelength and functionality.

Innovation Solution

A substrate-embedded waveguide structure is developed, featuring a trench in the semiconductor substrate with cladding material, a core, and cavities within the core, allowing for larger core dimensions and improved coupling with off-chip optical fibers, while avoiding strict limitations on waveguide core dimensions during front-end-of-the-line processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If optical and electronic devices are integrated on the same SOI chip using conventional waveguide structures, then device integration is achieved, but the core dimensions of optical waveguides are restricted which limits cut-off wavelength and functionality

Engineering Contradiction:
Improvefunctionality of optical devicesVSAvoidcore dimensions of optical waveguides
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent transitions from planar waveguide structures to vertically stacked three-dimensional waveguide structures. Multiple waveguide cores are arranged in different vertical layers, enabling larger effective core dimensions and extended cut-off wavelengths while maintaining compatibility with standard SOI chip fabrication processes. This vertical stacking approach resolves the dimensional constraints of conventional two-dimensional waveguides.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements nested waveguide structures where smaller waveguide cores are positioned within or adjacent to larger waveguide cores in the vertical stacking arrangement. This nesting enables progressive extension of cut-off wavelengths by combining multiple waveguide modes, thereby enhancing optical functionality without compromising manufacturing precision.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Ease of operation

If larger core dimensions are used to improve cut-off wavelength and coupling with off-chip optical fibers, then optical coupling efficiency is improved, but integration with standard SOI chip processing becomes difficult

Engineering Contradiction:
Improvecoupling with off-chip optical fibersVSAvoidintegration with SOI chip processing
Core Design Contradiction:
Ease of operationVSEase of manufacture

Solution Approach 1:

By utilizing the vertical dimension through stacked waveguide layers, the patent achieves larger effective core dimensions that improve optical coupling efficiency. These vertically stacked structures are fabricated using standard SOI processing techniques, thereby maintaining ease of manufacture while enhancing coupling performance with off-chip optical fibers.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The waveguide structures are pre-configured during front-end-of-line processing with predetermined core dimensions and vertical stacking arrangements optimized for both large-mode-area operation and compatibility with subsequent SOI chip fabrication steps. This preliminary configuration ensures that larger core dimensions are achieved without compromising integration with standard processing flows.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enables larger core dimensions for the waveguide, enhancing the cut-off wavelength and improving coupling with off-chip optical fibers, thereby addressing integration challenges and improving the functionality of optical devices on SOI chips.

Implementation Method 1

a waveguide in a trench in the semiconductor substrate and including: cladding material lining the trench; a core within the trench on the cladding material

Methodology Applied
Scientific EffectTotal internal reflection: Total Internal Reflection

Data Source

PatentEP4394464A1Structure with substrate-embedded arrow waveguide and method
Publication Date: 2024.07.03 GLOBALFOUNDRIES US INC
  • EP4394464A1 patent drawingFigure 1A
  • EP4394464A1 patent drawingFigure 1B~1C
  • EP4394464A1 patent drawingFigure 2A

AI summary

Disclosed are a structure with a substrate-embedded waveguide and a method of forming the structure. The waveguide includes cladding material lining a trench in a substrate, a core in the trench on the cladding material, and at least one cavity within the core. Each cavity extends from one end of the core toward the opposite end and contains a low refractive index material or is under vacuum so the waveguide is an arrow waveguide. An insulator layer is on the substrate and extends laterally over the waveguide and a semiconductor layer is on the insulator layer. Additionally, depending upon the embodiment, an additional waveguide can be aligned above the substrate-embedded waveguide either on the isolation region or on a waveguide extender that extends at least partially through the isolation region and the insulator layer to the waveguide.