Arsenic Oxide Removal in Optical Semiconductor Mesa Etching

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Solution Overview

Problem

Conventional methods for manufacturing optical semiconductor devices with semiconductor mesas face issues due to arsenic oxide formation on the top layer, leading to residual portions that decrease yield and cause contamination or abnormal growth, especially when using arsenic-containing layers.

Innovation Solution

A method involving exposure to an oxygen-containing atmosphere followed by heating to 250°C or more, potentially under reduced pressure and in a nitrogen or inert atmosphere, and using specific etching gases or etchants like hydrogen iodide or chlorine-containing gases, to remove arsenic oxide and prevent its reformation during the dry etching process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the stacked semiconductor layer is exposed to an oxygen-containing atmosphere between mask formation and dry etching, then the mask can be formed and transferred, but arsenic oxide forms on the top layer causing residual portions that decrease yield

Engineering Contradiction:
Improvemask formation and transferVSAvoidyield
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies preliminary action by performing a cleaning treatment on the top layer before dry etching to remove arsenic oxide that formed during exposure to oxygen-containing atmosphere. This preliminary cleaning prevents residual portions from forming during subsequent etching, thereby maintaining high yield while still allowing mask formation and transfer to proceed normally.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent converts the harmful arsenic oxide formation into a beneficial process by using the oxygen exposure to intentionally form arsenic oxide, then removing it in a controlled cleaning step. This ensures complete removal of arsenic oxide without damaging the underlying semiconductor layer, transforming the harmful oxidation into a controlled preparatory step that improves etching quality.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Productivity

If arsenic oxide is present on the top layer, then the dry etching process can proceed, but residual portions remain that cause contamination and abnormal growth

Engineering Contradiction:
Improveetching process speedVSAvoidcontamination and abnormal growth
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent performs a cleaning treatment as a preliminary action before dry etching to remove arsenic oxide from the top layer. This prevents residual portions from forming during etching, eliminating the source of contamination and abnormal growth while maintaining efficient etching productivity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a cleaning treatment as an intermediary step between oxygen exposure and dry etching. This intermediary step removes arsenic oxide without damaging the semiconductor layer, acting as a mediator that eliminates harmful factors while preserving the benefits of the previous steps.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If the top layer is exposed to oxygen-containing atmosphere, then arsenic oxide forms on the surface, but this oxide layer prevents complete etching of the stacked semiconductor layer

Engineering Contradiction:
Improvesemiconductor mesa formationVSAvoidunetched semiconductor material
Core Design Contradiction:
Manufacturing precisionVSLoss of substance

Solution Approach 1:

The patent applies preliminary action by cleaning the top layer to remove arsenic oxide before dry etching. This ensures that the etching process can proceed uniformly across the entire surface without being blocked by oxide, preventing unetched residual portions and maintaining precise semiconductor mesa formation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent converts the harmful arsenic oxide blockage into a beneficial process by using controlled oxygen exposure followed by selective removal. The oxide is intentionally formed and then completely removed in a controlled manner, ensuring uniform etching while preventing any residual portions that would cause imprecision.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively removes arsenic oxide, reducing residual portions and improving yield by ensuring clean etching and preventing contamination, thus enhancing the manufacturing process for optical semiconductor devices.

Implementation Method 1

a heating step of heating the stacked semiconductor layer to a temperature of 250° C. or more

Methodology Applied
Scientific EffectThermal heating: Heating

Implementation Method 2

arsenic in the top layer reacted with oxygen (O2) contained in the oxygen-containing atmosphere to form arsenic oxide on the top layer

Methodology Applied
Scientific EffectOxidation reaction: Oxidation

Implementation Method 3

a step of forming a semiconductor mesa in the stacked semiconductor layer, the semiconductor mesa being formed by etching the stacked semiconductor layer by a dry etching method using the mask

Methodology Applied
Scientific EffectDry etching:

Data Source

PatentUS9123539B2Method for manufacturing optical semiconductor device
Publication Date: 2015.09.01 SUMITOMO ELECTRIC INDUSTRIES LTD
  • US9123539B2 patent drawing
  • US9123539B2 patent drawing
  • US9123539B2 patent drawing

AI summary

A method for manufacturing an optical semiconductor device includes a step of forming a stacked semiconductor layer on a substrate, the stacked semiconductor layer including a plurality of semiconductor layers; a step of forming a mask on a top layer of the stacked semiconductor layer, the mask covering a portion of the top layer; an exposing step of exposing the top layer of the stacked semiconductor layer to an oxygen-containing atmosphere; after the exposing step, a heating step of heating the stacked semiconductor layer to a temperature of 250° C. or more; and after the heating step, a step of forming a semiconductor mesa in the stacked semiconductor layer, the semiconductor mesa being formed by etching the stacked semiconductor layer by a dry etching method using the mask. The top layer of the plurality of semiconductor layers of the stacked semiconductor layer contains arsenic.