As2Te3-Ge3Se7 Alloy Memory Device for Crossbar Leakage
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Solution Overview
Problem
Conventional non-volatile resistive memories, such as PCRAM, face challenges with long writing times, limited density, reduced retention duration, and high sub-threshold currents in crossbar architectures, which hinder their integration with selectors and impact memory performance.
Innovation Solution
A non-volatile memory device with a chalcogenide active layer made of an As2Te3 and Ge3Se7 alloy, allowing for programmable threshold voltages and low sub-threshold currents, enabling both memory and selective functions without relying on resistive states, thus reducing leakage currents and enhancing integration density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional non-volatile resistive memories (PCRAM) are used in crossbar architectures, then memory density can be increased, but sub-threshold currents increase and leakage currents worsen
Solution Approach 1:
The patent changes the material composition parameter of the active layer from conventional chalcogenide materials to a specific alloy of As2Te3 and Ge3Se7. This material parameter change fundamentally alters the electrical characteristics, achieving simultaneously low sub-threshold currents (less than 10^-7 A) and programmable threshold voltages, thereby resolving the contradiction between memory density and sub-threshold current in crossbar architectures
Solution Approach 2:
The patent employs a composite material approach by creating an alloy combination of As2Te3 and Ge3Se7. This composite material integrates the beneficial properties of both components: As2Te3 provides the threshold switching behavior while Ge3Se7 contributes to reducing leakage currents. The composite structure enables the device to function as both a memory element and a selector, eliminating the need for separate selector components in crossbar architectures
2Quantity of substance
If transistor size is reduced to increase memory density, then reading signal decreases and retention duration reduces
Solution Approach 1:
The patent changes the fundamental operating parameter from resistive state dependence to threshold voltage programmability. By storing information in the threshold voltage value rather than resistive state, the device maintains reliable retention even as device size decreases. The threshold voltage programming mechanism remains effective at smaller dimensions, preserving retention duration while enabling higher memory density
3Speed
If PCRAM memories use phase transition induced by joule effect, then writing speed can be improved, but writing time remains long (a few microseconds)
Solution Approach 1:
The patent replaces the thermal-mechanical phase transition mechanism (joule heating inducing crystalline-amorphous phase change) with an electrical field-driven threshold switching mechanism. This substitution eliminates the need for thermal diffusion and phase transformation, which are inherently slow processes. The new mechanism operates through direct electrical field effects on the As2Te3-Ge3Se7 alloy, achieving significantly faster switching speeds and reducing writing time from microseconds to nanoseconds
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device achieves low sub-threshold currents and programmable threshold voltages, reducing leakage currents and improving memory density, while preventing parasitic currents in crossbar arrays, thus enhancing the performance and endurance of resistive memories.
Implementation Method 1
the device having in said first memory state a characteristic voltage current such that it switches from a highly resistive state to a state that is less resistive than the highly resistive state as soon as a voltage greater than or equal to Vth1 is applied between the first and second electrodes
Implementation Method 2
the intensity of the current passing through said memory in its highly resistive state being strictly less than 10−7 A
Data Source
AI summary
A selective non-volatile memory device includes a first electrode, a second electrode and at least one layer made of an active material. The device has at least two programmable memory states associated with two voltage thresholds and also provides a selective role when it is in a highly resistive state.