Ashable Hardmask Structure for Sub-100 Nm Pattern Stability

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Solution Overview

Problem

Wiggling of patterned features in semiconductor structures is a challenge, especially at sub-100 nm scales, affecting the precision and integrity of semiconductor features.

Innovation Solution

A hardmask structure comprising a first ashable hardmask with a stress of about −100 MPa to about 100 MPa, a first dielectric antireflective coating, and a second ashable hardmask, which reduces deformation and wiggling by controlling stress levels, allowing for precise pattern transfer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a hardmask layer is used for patterning semiconductor structures, then the patterning process can be performed, but stress-induced deformation causes wiggling of the patterned features

Engineering Contradiction:
Improvepattern precisionVSAvoidhardmask deformation
Core Design Contradiction:
Manufacturing precisionVSStability of the object's composition

Solution Approach 1:

The patent applies parameter changes by controlling the stress of the first ashable hardmask to be within a specific range (from about -100 MPa to about 100 MPa). This stress parameter control prevents excessive deformation of the hardmask layer during patterning, thereby reducing wiggling of the patterned features while maintaining effective patterning capability.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If the feature size is reduced to sub-100 nm scale, then higher integration density is achieved, but wiggling issues become more severe

Engineering Contradiction:
Improvefeature size controlVSAvoidwiggling severity
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent addresses the worsening wiggling at sub-100 nm scale by implementing a multi-layer hardmask structure with controlled stress parameters. The first ashable hardmask has stress controlled within -100 MPa to 100 MPa, and the second ashable hardmask is disposed above it, creating a composite structure that maintains pattern fidelity at reduced feature sizes.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses a composite hardmask structure consisting of multiple layers with different properties. The first ashable hardmask and second ashable hardmask form a composite system where each layer contributes to overall pattern stability, enabling precise sub-100 nm feature patterning without severe wiggling.

Inventive Principle:
Principle #40Composite materials

3Manufacturing precision

If the hardmask stress is not controlled, then the hardmask can be easily formed, but patterned feature wiggling occurs

Engineering Contradiction:
Improvepattern accuracyVSAvoidstress control requirement
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent implements parameter control by specifying that the first ashable hardmask stress must be within the range of about -100 MPa to about 100 MPa. This controlled stress parameter ensures accurate pattern formation while the multi-layer structure design provides a systematic approach to managing the complexity of stress control.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12616004B2Hardmask structure and method of forming semiconductor structure
Publication Date: 2026.04.28 NAN YA TECH
  • US12616004B2 patent drawing
  • US12616004B2 patent drawing
  • US12616004B2 patent drawing

AI summary

A hardmask structure and a method of forming a semiconductor structure are provided. The hardmask structure includes a first ashable hardmask, a first dielectric antireflective coating, and a second ashable hardmask. The first dielectric antireflective coating is disposed on the first ashable hardmask. The second ashable hardmask is disposed on the first dielectric antireflective coating. A stress of the first ashable hardmask is from about −100 MPa to about 100 MPa.