Phase-Shifted ASIC Clock Domains for Resonant Noise Reduction
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Solution Overview
Problem
Synchronous digital logic devices face issues with clock drift and resonant circuit noise due to synchronized transistor state transitions, leading to increased power consumption and complexity, especially in modern devices with high transistor density.
Innovation Solution
Divide clock domains into phase-shifted-clock domains, where each domain operates at the same frequency but with a phase shift relative to a common reference clock, reducing transistor resonance and power consumption by staggering state transitions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If synchronous circuits use the same global clock to synchronize multiple blocks, then clock drift problems are avoided, but resonant circuit noise increases due to large numbers of transistors toggling at once
Solution Approach 1:
The patent divides the clock domain into multiple phase-shifted-clock domains, where each domain uses a local clock that is phase-shifted relative to others. This segmentation allows transistors in different domains to toggle at different times, reducing resonant noise while maintaining synchronization through the phase-shifted relationship between clocks.
Solution Approach 2:
The patent changes the phase parameter of clock signals to create phase-shifted clocks. By adjusting the phase offset between different clock domains, the system maintains the same frequency for synchronization purposes while staggering transistor switching times to reduce resonant noise.
2Productivity
If clock frequency is increased to improve processing speed, then productivity increases, but resonant circuit noise and power consumption are amplified
Solution Approach 1:
By segmenting the clock domain into phase-shifted sub-domains, the patent enables higher clock frequencies to be used without proportionally increasing resonant noise. The segmentation distributes transistor switching events across different phase intervals, preventing the amplification of resonant effects that would occur with simultaneous toggling at high frequencies.
3Object-generated harmful factors
If multiple independent local clocks are used in different blocks, then resonant circuit noise is reduced, but clock drift occurs requiring inefficient rebuffering operations
Solution Approach 1:
The patent changes the phase parameter of locally generated clocks to create phase-shifted versions of a reference clock. This allows each block to have its own local clock (reducing resonant noise) while maintaining a deterministic phase relationship with other blocks (avoiding clock drift), thereby eliminating the need for rebuffering operations.
Data Source
AI summary
An electronic device is disclosed. The electronic device comprises a first clock configured to operate at a frequency. First circuitry of the electronic device is configured to synchronize with the first clock. Second circuitry is configured to determine a second clock based on the first clock. The second clock is configured to operate at the frequency of the first clock, and is further configured to operate with a phase shift with respect to the first clock. Third circuitry is configured to synchronize with the second clock.