ASIL C/D Compliant Bus for Automotive IC Data Exchange
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Automotive control systems face challenges in ensuring safety and compliance with higher Automotive Signal Integrity Levels (ASIL C/D) due to the increasing complexity and data requirements from sensors during autonomous driving, necessitating a robust and reliable method for connecting and exchanging data among various integrated circuits.
Innovation Solution
An ASIL C/D compliant bus arrangement and method for connecting integrated circuits, featuring frequency setting, role arbitration, data integrity checks using CRC and frame repetition, failure detection, and monitoring mechanisms, including bus stuck-at failure detection, failure filtering, remote clock timing, and system reliability monitoring, to ensure safe and reliable data exchange.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional bus protocols are used for connecting integrated circuits, then device complexity is reduced, but reliability and safety compliance (ASIL C/D) cannot be achieved
Solution Approach 1:
The bus protocol is segmented into distinct functional layers: physical layer for signal transmission, data link layer for error detection using CRC, and application layer for safety monitoring. This segmentation allows each layer to be optimized independently for its specific function while maintaining overall system reliability and compliance with ASIL C/D requirements.
Solution Approach 2:
Error detection mechanisms such as CRC checks are performed preliminarily at the data link layer before data reaches the application layer. Safety monitoring is continuously performed in advance to detect potential failures before they compromise system safety, enabling preventive action rather than reactive response.
2Reliability
If comprehensive error detection and safety monitoring mechanisms are implemented, then reliability is improved, but device complexity increases
Solution Approach 1:
A dedicated safety monitoring unit acts as an intermediary between the bus communication and the application logic. This intermediary continuously monitors data integrity, performs safety checks, and manages error handling, thereby improving reliability without requiring complex error handling logic to be distributed across all system components.
Solution Approach 2:
The bus protocol includes self-diagnostic capabilities where each device can detect and report its own status and errors. The system performs self-verification through continuous monitoring and automatic error detection, reducing the need for external complexity while maintaining high reliability.
3Reliability
If multiple integrated circuits are connected with comprehensive safety features, then system coverage for ASIL C/D is achieved, but communication overhead increases
Solution Approach 1:
Safety monitoring and error checking are performed periodically at optimized intervals rather than continuously for every single bit. The bus protocol uses periodic acknowledgment frames and status checks that balance thorough safety verification with efficient use of communication bandwidth, reducing overhead while maintaining ASIL C/D coverage.
4Reliability
If robust error detection and CRC checks are implemented, then data integrity is improved, but processing time increases
Solution Approach 1:
The CRC polynomial and check parameters are optimized to provide adequate error detection capability with minimal processing overhead. The protocol uses efficiently calculated CRC checks with predetermined parameters that balance thoroughness of error detection against processing time, maintaining data integrity while preserving acceptable data exchange speeds.
Data Source
AI summary
The invention relates to an arrangement and a method performing data exchange between various integrated circuits, IC, (3,4,5,6,7) in an automotive control system wherein the data are exchanged by a bus and has the object to enable ASIL C/D system coverage and to tie various ICs (clocks, regulators, memory interfaces, sensor signal conditioners, power management ICs etc.) This is solved the data are exchanged by a bus being ASIL C/D compliant and forming a common protocol to exchange information among the integrated circuits (3,4,5,6,7). The method is solved by functions implemented within the bus as setting the frequency of operation; arbitrating roles of the integrated circuits as master or slave device; checking integrity of exchanged data; frame repetition; detecting bus stuck-at failure modes; filtering or denouncing failures and warnings from peripheral devices; detecting remote out of specification local clock; and monitoring and predicting system reliability and profiling maintenance events.