ASIC Package Layout With Photonics and Vertical Power Delivery

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Solution Overview

Problem

Input/output (I/O) systems connecting application specific integrated circuit (ASIC) packages to other components often experience bandwidth bottlenecks due to insufficient data throughput, leading to signal loss exacerbated by long signal traces with high-frequency roll-off, despite the use of low dielectric constant materials and smoothed traces.

Innovation Solution

Integration of photonic modules directly onto the ASIC package substrate, reducing trace length and signal loss, and inclusion of a vertically integrated voltage regulator to minimize copper losses and heat generation, with power delivery via a land grid array socket.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If I/O systems connect ASIC packages to other components using traditional copper traces, then data transmission is enabled, but signal loss increases due to long trace length and high-frequency roll-off

Engineering Contradiction:
Improvesignal transmission qualityVSAvoidtrace length
Core Design Contradiction:
ReliabilityVSLength of moving object

Solution Approach 1:

The patent replaces traditional electrical copper trace transmission with optical fiber transmission. Optical fibers substitute for copper traces, enabling light-based signal transmission instead of electrical signals, which eliminates signal loss issues associated with long copper traces at high frequencies.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent implements vertical integration by stacking photonic modules and ASIC dies in different layers connected via through-substrate vias. This three-dimensional arrangement reduces the horizontal trace length needed for connections, thereby reducing signal loss while maintaining connectivity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If photonic modules are integrated onto the ASIC package substrate, then signal loss is reduced, but device complexity increases

Engineering Contradiction:
Improvesignal transmission qualityVSAvoidpackage structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges photonic modules and ASIC dies into a single integrated package structure. By combining these previously separate components into one unified package with shared substrates and interconnects, the overall system complexity is managed while achieving the benefit of reduced signal loss through shorter optical paths.

Inventive Principle:
Principle #5Merging (Combining)

3Use of energy by moving object

If traditional horizontal power delivery is used, then power reaches the ASIC die, but copper losses and heat generation increase

Engineering Contradiction:
Improvepower delivery efficiencyVSAvoidcopper losses
Core Design Contradiction:
Use of energy by moving objectVSLoss of energy

Solution Approach 1:

The patent transitions from horizontal power delivery through copper traces to vertical power delivery through stacked layers connected by through-substrate vias. This vertical arrangement reduces the path length for power delivery and minimizes copper losses while improving thermal management through better heat dissipation paths.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Productivity

If high processing speeds are achieved in ASIC dies, then computational capability increases, but I/O bandwidth becomes a bottleneck

Engineering Contradiction:
Improveprocessing speedVSAvoiddata throughput capacity
Core Design Contradiction:
ProductivityVSLoss of information

Solution Approach 1:

The patent replaces electrical signal transmission through copper traces with optical signal transmission through optical fibers. This substitution enables significantly higher bandwidth and data throughput capacity, matching the high processing speeds of modern ASIC dies and eliminating the I/O bandwidth bottleneck.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Significantly reduces signal loss and copper losses, enabling higher operating speeds with improved signal transmission and reduced material and production costs, while enhancing thermal management and preventing solder electromigration.

Implementation Method 1

one or more photonic modules attached to the substrate... one or more serializer/deserializer (SerDes) interfaces connecting the IC die to the one or more photonic modules

Methodology Applied
Scientific EffectOptoelectric conversion: Photoelectric Effect

Implementation Method 2

The one or more SerDes interfaces may include a plurality of copper traces and the copper traces may be deposited on the substrate

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 3

inclusion of a vertically integrated voltage regulator to minimize copper losses and heat generation

Methodology Applied
Scientific EffectVoltage regulation: Electrical Resistance

Implementation Method 4

Power may be delivered to the IC package via the LGA socket

Methodology Applied
Scientific EffectElectrical contact conduction: Conduction (electrical)

Data Source

PatentUS11978721B2ASIC package with photonics and vertical power delivery
Publication Date: 2024.05.07 GOOGLE LLC
  • US11978721B2 patent drawing
  • US11978721B2 patent drawing
  • US11978721B2 patent drawing

AI summary

The technology relates to an integrated circuit (IC) package. The IC package may include a substrate. An IC die may be mounted to the substrate. One or more photonic modules may be attached to the substrate and one or more serializer/deserializer (SerDes) interfaces may connect the IC die to the one or more photonic modules. The IC die may be an application specific integrated circuit (ASIC) die and the one or more photonic modules may include a photonic integrated circuit (PIC) and fiber array. The one or more photonic modules may be mounted to one or more additional substrates which may be attached to the substrate via one or more sockets.