ASIC Performance Throttling for Thermal and Power Limits

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Solution Overview

Problem

Application-specific integrated circuits (ASICs) face performance degradation due to excess heat, power consumption, and resource limitations, leading to hardware issues that existing technologies fail to effectively prevent or manage.

Innovation Solution

The implementation of a digital memory circuit with a media management layer and cache subsystem that monitors and regulates resource demands, employing performance throttling mechanisms based on physical and logical parameters, such as temperature, power consumption, and buffer availability, to proactively manage and reduce system load.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the ASIC processes service requests at high performance levels, then productivity is improved, but heat generation and power consumption increase causing hardware degradation

Engineering Contradiction:
Improveservice request processing rateVSAvoidASIC operating temperature
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The system dynamically adjusts the performance throttling state of the ASIC based on real-time monitoring of temperature, power consumption, and resource utilization metrics. The media management layer transitions between different performance states (normal operation, performance throttling, and performance throttling with backpressure) to adapt to changing thermal and power conditions, resolving the contradiction between maintaining high productivity and preventing thermal degradation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operational parameters by adjusting performance throttling levels in response to monitored physical conditions. When temperature or power consumption exceeds thresholds, the system modifies processing rates, buffer allocation, and request handling parameters to reduce thermal load while maintaining acceptable productivity levels.

Inventive Principle:
Principle #35Parameter changes

2Power

If the ASIC operates at high power levels, then processing capability is improved, but power consumption exceeds limits causing hardware stress

Engineering Contradiction:
Improveprocessing capabilityVSAvoidASIC power consumption
Core Design Contradiction:
PowerVSUse of energy by stationary object

Solution Approach 1:

The media management layer implements continuous feedback monitoring of power consumption metrics and uses this information to adjust ASIC performance throttling in real-time. When power consumption approaches or exceeds defined limits, the system reduces processing intensity and adjusts operational parameters to maintain power usage within safe thresholds while preserving essential functionality.

Inventive Principle:
Principle #23Feedback

3Productivity

If the ASIC handles excessive service requests, then productivity is improved, but resource depletion and performance degradation occur

Engineering Contradiction:
Improveservice request throughputVSAvoidASIC operational reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system performs preliminary monitoring of resource utilization metrics (buffer availability, processing queue depth, component stress levels) before critical degradation occurs. The media management layer proactively adjusts performance throttling based on predicted resource exhaustion scenarios, preventing reliability issues by taking corrective action before resources are fully depleted or hardware stress becomes critical.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system applies preliminary anti-action by implementing performance throttling and backpressure mechanisms that counteract the tendency toward resource exhaustion and hardware stress. When monitoring indicates approaching resource limits or stress thresholds, the system preemptively reduces request throughput and adjusts operational intensity to prevent the development of harmful conditions that would compromise reliability.

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS12039172B2Managing performance throttling in a digital controller
Publication Date: 2024.07.16 MICRON TECHNOLOGY INC
  • US12039172B2 patent drawing
  • US12039172B2 patent drawing
  • US12039172B2 patent drawing

AI summary

Provided is a system and method for storing, via a processor, in a memory of an application specific integrated circuit (ASIC), one or more threshold values responsive to at least one of physical layer and processing layer operating conditions of the ASIC. Also included is monitoring at least one of a physical layer operating condition value and a processing layer performance condition value of the ASIC, the moderating forming a monitored value, comparing the monitored value with the stored threshold values, and throttling processing layer performance of the ASIC when the monitored value exceeds at least one of the stored threshold values.