Programmable ASIC Pin Mapping for Packaging-Limited SoC I/O
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Solution Overview
Problem
General purpose SoC ASICs face pin resource constraints due to limitations in integrated circuit packaging, making it difficult to assign pin connections for multiple functional units without resorting to expensive packaging techniques or complex override systems, which can lead to inefficient firmware development and unexpected behavior.
Innovation Solution
Implementing a programmable interface that allows each pin to be independently connected to any functional unit connection, using a crossbar switch or multiplexer, enabling flexible pin mapping and reconfiguration during chip preparation, such as through boot firmware or non-volatile programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of pins is increased to accommodate more functional units, then the connectivity and functionality of the ASIC is improved, but the packaging cost and complexity increase significantly
Solution Approach 1:
The patent implements multi-functionality by allowing each pin to be dynamically assigned to different functional units through programmable mapping. The pin assignment is not fixed but can be reconfigured based on the specific application requirements, enabling a small number of pins to serve multiple purposes across different functional units such as parallel port, serial interfaces, and general purpose I/O.
Solution Approach 2:
The patent introduces dynamic pin mapping where the connection between pins and functional units can be changed during operation or configuration. This is achieved through programmable assignment mechanisms that allow the pin-to-functional-unit mapping to be adjusted without physical reconfiguration, thereby adapting the same physical pins to different logical functions as needed.
2Reliability
If a unique ASIC is designed for each application with hard-wired pin mappings, then the pin connections are simplified and reliable, but the development cost and time increase due to requiring multiple chip designs
Solution Approach 1:
The patent creates a universal ASIC platform where a single chip design can support multiple applications through programmable pin mapping. Instead of designing separate hard-wired ASICs for each application, the same base chip can be configured for different functions by changing the pin assignment software, thereby reducing the number of unique chip designs while maintaining reliable pin connections through the programmable mapping mechanism.
3Adaptability or versatility
If the pin mapping is made flexible and programmable, then the adaptability to different applications is improved, but the firmware programming complexity and development time increase
Solution Approach 1:
The patent introduces an intermediary mapping mechanism that simplifies the relationship between pins and functional units. This intermediary layer provides standardized interfaces and abstraction layers that make the pin mapping process more manageable, reducing the complexity of firmware programming by providing structured tools and frameworks for configuration rather than requiring direct manual mapping of each pin to every possible function.
4Productivity
If multiple pins are assigned to the same functional unit, then the pin usage efficiency is improved, but the control and configuration complexity of the functional units increases
Solution Approach 1:
The patent implements dynamic control mechanisms that allow the assignment and reassignment of pins to functional units to be changed programmatically. This dynamic capability enables efficient pin usage by allowing multiple pins to be assigned to the same functional unit when needed, while the system automatically manages the complexity of control through software-based configuration rather than hard-wired logic, thereby maintaining usability despite the increased flexibility.
Data Source
AI summary
Disclosed herein are various embodiments of an application specific integrated circuit (ASIC). The ASIC includes a plurality of functional units. Each functional unit may include a plurality of connections. The ASIC may also include a plurality of input and/or output pins configured to couple the ASIC to a circuit board. A programmable client may be associated with each pin, and each programmable client may be programmed to selectively connect the pin with which it is associated to one of the plurality of connections of one of the plurality of functional units. In various embodiments, the programmable client may be embodied as a multiplexer or a crossbar switch. Further, the programmable client may be programmed using any of boot firmware, hardware jumpers, and/or non-volatile programming registers.