Programmable Bypass Logic for ASIC Design Fault Correction
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Solution Overview
Problem
ASIC-based devices often suffer from small design errors that can lead to disastrous consequences, such as delayed market entry and loss of reputation, due to the inability to detect and correct faults post-manufacture, especially in rapidly changing consumer markets where time-to-market is critical.
Innovation Solution
Incorporating a small amount of programmable logic in a hybrid ASIC device to temporarily bypass or correct fault-infected ASIC blocks, allowing the device to continue functioning correctly for the majority of its operations while deactivating the faulty block during error periods, and enabling in-situ programming for error correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional ASIC methodology with fixed circuit structures is used, then manufacturing cost is reduced and device compactness is improved, but the ability to detect and correct design faults post-manufacture is lost
Solution Approach 1:
The ASIC device is segmented into fixed circuit portions and a separate programmable logic portion. This segmentation allows the majority of the device to maintain the cost and compactness benefits of conventional ASIC fabrication, while the isolated programmable segment provides fault detection and correction capabilities that can be configured after manufacture to address design faults in the fixed circuit portions.
Solution Approach 2:
A programmable logic intermediary is introduced between the input/output interfaces and the fixed circuit portions. This intermediary acts as a mediator that can detect faults in the fixed circuit, bypass faulty operations, and provide corrected outputs, thereby enabling fault correction without requiring changes to the expensive fixed ASIC fabrication process.
2Reliability
If a small amount of programmable logic is added to bypass faults, then fault correction capability is improved, but device complexity and circuit space consumption increase
Solution Approach 1:
Instead of making the entire ASIC programmable, only a partial programmable logic portion is added - just enough to detect and bypass specific design faults. This partial action approach provides the necessary fault correction capability while minimizing the increase in device complexity and circuit space, avoiding the excessive complexity of fully programmable devices.
Solution Approach 2:
The programmable logic is localized to specific regions where fault detection and correction is needed, rather than distributing programmability throughout the entire device. This local quality approach concentrates the complexity only where necessary to address design faults, keeping the rest of the device simple and ASIC-optimized.
3Reliability
If fully programmable devices like FPGAs are used instead of ASICs, then design fault correction capability is improved, but manufacturing cost and signal propagation time increase
Solution Approach 1:
The invention merges the advantages of both ASIC and FPGA approaches by combining fixed circuit portions (providing low cost and fast signal propagation) with a programmable logic portion (providing fault correction capability). This hybrid merging allows the device to achieve fault correction without paying the full cost penalty of fully programmable devices.
Solution Approach 2:
The programmable logic portion serves multiple functions: it can detect design faults, bypass faulty operations, provide corrected logic functions, and even be reconfigured for different applications. This multi-functionality allows a single hybrid device to replace what would otherwise require separate ASIC and FPGA components, reducing overall system cost and complexity.
Data Source
AI summary
A relatively small amount of programmable or reprogrammable logic (pro-Logic) is included in a mostly-ASIC device so that such re/programmable logic can be used as a substitute for, or for bypassing a fault-infected ASIC block (if any) either permanently or at times when the fault-infected ASIC block is about to perform a fault-infected operation (bug-infected operation): The substitution or bypass does not have to be a permanent one that is in effect at all times for the entirety of the fault-infected ASIC block. Instead affected outputs of the faulty ASIC block can be disabled from working just at the time they would otherwise initiate or propagate an error. Such fault-infected operations of the temporarily deactivated ASIC block(s) may be substituted for by appropriately programmed pro-Logic at the appropriate times.