ASIC Monitoring Network for Runtime Debug Without Recompilation
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Solution Overview
Problem
Traditional debug networks in programmable logic devices (PLDs) are intrusive, resource-intensive, and require downtime or recompilation, limiting their ability to provide meaningful debug data and adapt to unanticipated usage or operating conditions, and often result in wasted resources and inefficient debugging processes.
Innovation Solution
A non-intrusive configuration and monitoring network that allows unobtrusive full read access to running user designs, enabling rapid-response monitoring and debugging without stopping the device or recompiling code, using reconfigurable circuits and incremental configuration data to monitor and respond to events without interfering with the primary circuit structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If debug functionality is implemented using configurable circuits of the PLD, then debug capabilities are provided, but PLD resources are consumed leaving fewer resources for user design
Solution Approach 1:
The patent segments the PLD into distinct functional areas: user design logic implemented in configurable logic blocks and debug logic implemented in separate debug logic blocks. This segmentation allows independent resource allocation where debug resources do not compete with user design resources, resolving the contradiction between providing debug capability and minimizing PLD resource consumption.
2Adaptability or versatility
If the debug network is changed to improve debugging functionality, then debug capabilities are enhanced, but the entire IC design must be recompiled and downloaded
Solution Approach 1:
The patent implements dynamic reconfigurability where the debug logic blocks can be modified at runtime without requiring full IC recompilation. The configuration memory allows debug logic to be reprogrammed while the user design continues to operate, enabling adaptive debug functionality while minimizing downtime and avoiding the need to recompile the entire design.
3Reliability
If fixed-function debug circuitry is implemented, then debug functionality is available, but resources are dedicated and cannot be modified for different user needs
Solution Approach 1:
The patent creates universal debug logic blocks that can serve multiple debugging purposes and be configured for different user needs. The configurable nature of these blocks allows them to adapt to various debug scenarios while maintaining dedicated resource allocation, thus providing both reliability through dedicated resources and versatility through reconfigurability.
4Reliability
If extensive regression testing is performed to verify design changes, then design reliability is ensured, but debugging time and complexity increase
Solution Approach 1:
The patent segments verification into targeted testing of only the debug logic blocks rather than requiring extensive regression testing of the entire design. Since debug logic is separated into independent blocks with dedicated resources, changes to debug functionality can be verified in isolation, significantly reducing testing complexity while maintaining reliability.
Data Source
AI summary
An application-specific integrated circuit (ASIC) is provided. The ASIC includes a group of non-configurable circuits customized for performing operations for a particular use. The ASIC also includes a set of reconfigurable circuits for configurably performing a set of operations based on configuration data. The ASIC also includes a configuration and monitoring network that receives a set of signals from the non-configurable circuits of the ASIC. The configuration and monitoring network also receives incremental sets of configuration data while the ASIC is performing operations of the user design. Each incremental set of data is used for reconfiguring the configuration and monitoring network (i) to monitor one or more signals in the set of signals and (ii) to take a set of actions when values of the monitored signals satisfy a condition.