ASIC Astable Timer Circuit for Stable Implant Clock Signals
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Solution Overview
Problem
Implantable medical devices, such as spinal cord stimulation systems, face challenges with external crystal oscillators that occupy space, are prone to mechanical damage, and increase costs, while integrated clock signals on ASICs are sensitive to temperature and manufacturing variability, affecting clock signal precision and stability.
Innovation Solution
An improved astable timer circuit integrated within the ASIC, utilizing on-chip components and an adjustable resistor ladder for trimming, generates a stable clock signal with reduced power consumption and temperature insensitivity, using a Low Drop Out regulator to stabilize the power supply and achieve precise frequency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If an external crystal oscillator is used to generate a stable clock signal, then clock signal precision and stability are improved, but device size, cost, and mechanical reliability deteriorate due to occupied space, manufacturing complexity, and susceptibility to damage
Solution Approach 1:
The patent merges the clock signal generation function directly into the ASIC by integrating a ring oscillator and frequency divider circuitry within the same chip. This eliminates the need for external crystal oscillators and associated discrete components, thereby reducing device complexity, size, and cost while maintaining clock signal stability through on-chip temperature compensation mechanisms
Solution Approach 2:
The patent replaces the mechanical crystal oscillator system with an electronic ring oscillator implementation. The ring oscillator uses a series of inverting buffers or amplifiers connected in a loop to generate oscillations, substituting the mechanical resonance-based crystal oscillator with an electronic alternative that is more integrated, durable, and cost-effective while achieving comparable frequency stability
2Stability of the object's composition
If an external crystal oscillator is used, then clock signal stability is improved, but power consumption and device size increase
Solution Approach 1:
The patent combines the clock generation function with the main ASIC processing circuitry, eliminating separate power supply requirements for external oscillators. The integrated ring oscillator shares power rails and grounding with the rest of the ASIC, reducing overall power consumption while maintaining signal stability through careful layout and on-chip decoupling capacitors
Solution Approach 2:
The ring oscillator generates clock signals through periodic switching of inverting buffers, creating continuous oscillations without requiring the high sustained power consumption of external crystal oscillators. The oscillation period is determined by the propagation delay through the buffer chain, enabling efficient periodic operation with reduced power requirements
3Measurement precision
If a crystal oscillator is used, then frequency precision is improved, but device cost and manufacturing complexity increase
Solution Approach 1:
The patent integrates all clock generation components (ring oscillator, frequency dividers, temperature compensation circuits) into a single ASIC manufacturing process using standard CMOS or bipolar technology. This eliminates the need for separate crystal mounting, wiring, and calibration steps, significantly simplifying manufacturing while maintaining frequency precision through on-chip temperature sensing and compensation mechanisms
Solution Approach 2:
The patent uses temperature compensation techniques that dynamically adjust oscillator parameters (such as bias currents or resistor values) based on measured temperature conditions. This maintains frequency precision across varying temperatures without requiring external crystal oscillators, enabling precise frequency control through programmable parameter changes rather than fixed mechanical components
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a compact, reliable, and cost-effective clock signal generation within the ASIC, reducing temperature variability and power consumption, ensuring precise timing for critical functions in implantable medical devices.
Implementation Method 1
utilizing on-chip components and an adjustable resistor ladder for trimming, generates a stable clock signal with reduced power consumption and temperature insensitivity, using a Low Drop Out regulator to stabilize the power supply
Implementation Method 2
An improved astable timer circuit integrated within the ASIC, utilizing on-chip components and an adjustable resistor ladder for trimming, generates a stable clock signal
Data Source
AI summary
Timer circuitry completely formable in an integrated circuit (IC) for generating a clock signal in an implantable medical device is disclosed. The timer circuitry can be formed on the same Application Specific Integrated Circuit typically used in the implant, and requires no external components. The timer circuitry comprises modification to a traditional astable timer circuit. A resistance in the disclosed timer circuit can be trimmed to adjust the frequency of the clock signal produced, thus allowing that frequency to be set to a precise value during manufacturing. Precision components are not needed in the RC circuit, which instead are used to set the rough value of the frequency of the clock signal. A regulator produces a power supply for the timer circuitry from a main power supply (Vcc), producing a clock signal with a frequency that is generally independent of temperature and Vcc fluctuations.