ASIC Via Segmentation for CMOS Integration and Aspect Ratio Reduction
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Solution Overview
Problem
The manufacturing process for vias in ASIC elements is complex due to their large aspect ratio, requiring intricate structuring and filling methods, which complicates the production and protection of metallic cores against external influences.
Innovation Solution
The implementation of vias in ASIC substrates involves defining the front side with a completely filled trench and the rear side with an open trench that connects to the filled front-side trench, reducing the aspect ratio and filling complexity, and allowing integration with CMOS processing, using dielectric and conductive materials to establish electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a blind opening via is completely filled with metal to protect against external influences, then the via is protected against external influences, but the manufacturing complexity increases due to large aspect ratio requiring intricate structuring and filling methods
Solution Approach 1:
The via structure is segmented into two parts: a front-side blind opening that is completely filled with metal for protection, and a rear-side opening that remains open to reduce aspect ratio. This segmentation allows each part to serve its specific function while overcoming the manufacturing complexity issue.
Solution Approach 2:
The via structure transitions from a single-dimensional blind opening to a two-dimensional structure with both front-side and rear-side components. The rear-side opening provides an alternative pathway that reduces the effective aspect ratio of the filled portion, simplifying manufacturing while maintaining protection.
2Device complexity
If a passage opening is produced on one side in a substrate, then the via structure is simple, but the aspect ratio becomes large requiring complex structuring and filling methods
Solution Approach 1:
The single passage opening is segmented into a front-side blind opening and a rear-side opening. The front-side portion is filled with metal while the rear-side portion remains open, effectively reducing the aspect ratio of the filled structure while maintaining electrical connectivity.
Solution Approach 2:
Different portions of the via structure have different properties: the front-side blind opening is completely filled with metal for protection and low resistance, while the rear-side opening remains open to reduce aspect ratio. This local differentiation optimizes both manufacturing precision and electrical performance.
3Manufacturing precision
If the front side of the via is defined by a completely filled trench and the rear side by an open trench, then the aspect ratio is reduced and filling complexity is lowered, but the via requires combination of front-side and rear-side processing
Solution Approach 1:
The via manufacturing process is segmented into front-side processing (creating and filling the blind opening) and rear-side processing (creating the open trench). This segmentation reduces the aspect ratio of the filled portion while distributing the processing complexity across two simpler steps.
Solution Approach 2:
The front-side blind opening is created and filled with metal before the rear-side processing is completed. This preliminary action allows the metal filling to be performed on a lower aspect ratio structure, simplifying the filling process while maintaining the final via functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process, reduces the aspect ratio of trenches, lowers filling complexity, and effectively protects the via against environmental influences by integrating it within CMOS processing and packaging, while maintaining a conductive connection between the active front and rear sides of the ASIC element.
Implementation Method 1
the conductive connection between the active front side and the rear side of the ASIC element is established via the semiconductor material of the ASIC substrate
Implementation Method 2
the front-side trench is at least coated using a dielectric material or even completely filled with a dielectric material
Data Source
AI summary
In an ASIC element, vias are integrated into the CMOS processing of an ASIC substrate. The ASIC element includes an active front side in which the circuit functions are implemented. The at least one via is intended to establish an electrical connection between the active front side and the rear side of the element. The front side of the via is defined by at least one front-side trench which is completely filled, and the rear side is defined by at least one rear-side trench which is not completely filled. The rear-side trench opens into the filled front-side trench.