Assist Circuit Voltage Control for Read Disturb Mitigation
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Solution Overview
Problem
As semiconductor memory devices are fabricated with finer processes and operate at lower voltages, they experience a 'read disturb' phenomenon where erroneous writing occurs, leading to errors during reading or writing operations, which existing technologies have not effectively addressed.
Innovation Solution
A memory device with an assist circuit that adjusts the word line driving voltage based on the characteristics of memory cells or temperature, using a diode N-channel metal oxide semiconductor (NMOS) transistor with a diode connection structure to reduce the word line driving voltage, thereby mitigating read disturb errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the word line driving voltage is increased to improve reading speed, then the reading speed is improved, but read disturb errors occur
Solution Approach 1:
The patent applies dynamics by making the word line driving voltage adjustable rather than fixed. The voltage control circuit dynamically changes the voltage level based on operating conditions, allowing optimization between speed and reliability. Specifically, the circuit can select between different voltage levels (e.g., first voltage level for normal operation, second voltage level for disturbed cells) to resolve the contradiction between reading speed and read disturb errors.
Solution Approach 2:
The patent changes the voltage parameter of the word line driving signal to resolve the contradiction. By modifying the voltage level from a fixed value to a variable parameter that can be adjusted between at least two different levels, the system can optimize performance. When read disturb errors occur, the voltage is changed to a higher level to correct the disturbance, while during normal operation, a lower voltage maintains faster reading speed.
2Reliability
If a voltage control circuit is added to adjust word line voltage, then read disturb errors are reduced, but device complexity increases
Solution Approach 1:
The patent merges the voltage control functionality with the existing word line driver circuit. The voltage control circuit is integrated into the memory device's existing structure, combining multiple functions (voltage generation, voltage selection, and word line driving) into a unified circuit architecture. This reduces the overall device complexity compared to adding a completely separate voltage control system.
Solution Approach 2:
The voltage control circuit operates autonomously based on detection of read disturb conditions. When a read disturb error is detected, the circuit automatically adjusts the word line voltage without requiring external intervention or complex control logic. The circuit serves itself by monitoring its own operating conditions and making necessary adjustments, thereby reducing overall system complexity.
Data Source
AI summary
Provided are a voltage control circuit including an assist circuit and a memory device including the voltage control circuit. The memory device includes: a volatile memory cell array, which is connected to a plurality of word lines and includes a memory cell including at least one transistor; and an assist circuit, which is connected to at least one of the plurality of word lines and adjusts a driving voltage level of each of the plurality of word lines, wherein the assist circuit includes a diode N-channel metal oxide semiconductor (NMOS) transistor having a gate and a drain connected to each other.