ASTC Texel Decoder with Shared Logic for Multiple CEMs
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Solution Overview
Problem
Existing ASTC decoders require significant chip area due to separate logic circuits for each color endpoint mode (CEM), leading to inefficiency and waste when only one CEM is used.
Innovation Solution
A decoder with a shared logic circuit capable of calculating color endpoints for multiple CEMs, using a set of adders and subtractors arranged as a tree structure, allowing efficient operation across different CEMs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate logic circuits are provided for each color endpoint mode (CEM), then the decoder can support multiple CEMs, but the chip area increases significantly
Solution Approach 1:
A single logic circuit is designed to perform multiple functions by supporting different color endpoint modes (CEMs) through configurable parameters. The circuit can be programmed or configured to implement various CEMs (such as CEM 7, 8, 9, 11, 12, 13, 14, 15) without requiring separate dedicated circuits for each mode, thereby reducing chip area while maintaining versatility.
Solution Approach 2:
The logic circuit incorporates dynamic configurability, allowing it to adapt its behavior based on the selected CEM. Control signals and configuration registers enable the circuit to dynamically switch between different CEM implementations, making the hardware flexible and multi-functional rather than static and dedicated to a single mode.
2Area of stationary object
If a single shared logic circuit is used for multiple CEMs, then chip area is reduced, but the circuit must handle different operations for different CEMs
Solution Approach 1:
The logic circuit is segmented into functional modules that can be independently configured for different CEMs. By dividing the circuit into manageable segments (such as separate processing paths for different CEM groups), the complexity is distributed and controlled, making the shared circuit easier to design and manage while supporting multiple modes.
Solution Approach 2:
Configuration registers and control logic act as intermediaries between the shared logic circuit and the different CEM requirements. These intermediaries translate high-level CEM selections into specific circuit operations, shielding the core logic from the complexity of supporting multiple modes directly and simplifying the overall circuit design.
Data Source
AI summary
A decoder for decoding a texel according to the Adaptive Scalable Texture Compression (ASTC) format, is configured to select a colour endpoint mode (CEM) of a plurality of different CEMs and generate a plurality of input values for inputting to multiple inputs of a logic circuit. The input values are generated such that the logic circuit will generate an intermediate output value for calculating colour endpoints in accordance with the selected CEM. For different CEMs, the decoder generates a different plurality of input values for inputting to the same inputs of the multiple inputs of the logic circuit. The logic circuit is configured to operate on the plurality of input values so as to generate the at least one intermediate output value; determine a colour endpoint pair in accordance with the selected CEM in dependence on the at least one intermediate output value; and decode the texel in dependence on the colour endpoint pair.