Asymmetric Redundancy for Autonomous Vehicle Compute Failover
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Solution Overview
Problem
Conventional symmetric redundancy solutions for autonomous vehicle computing systems result in increased costs, complexity, and inefficient resource consumption due to the need for duplicate hardware components, and fail to optimize data management during system failures.
Innovation Solution
An asymmetric redundancy system that utilizes an auxiliary computing system to detect conditions in the primary computing system, reload state and program data from a separate memory device, and reconnect to sensors, eliminating the need for full redundancy hardware.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If symmetric redundancy is implemented by deploying duplicate computational systems, then system reliability is improved, but device complexity and cost increase significantly
Solution Approach 1:
The patent implements asymmetric redundancy where a single auxiliary computing system replaces multiple symmetric redundant systems. The auxiliary system contains only the necessary components to take over from a failed primary system, rather than maintaining full duplicate systems. This asymmetric approach reduces device complexity and cost while preserving reliability through selective redundancy.
Solution Approach 2:
The patent uses data copying instead of hardware duplication. The auxiliary computing system copies necessary state data and program instructions from the primary system's memory devices, rather than requiring identical hardware components. This allows reliability to be maintained through data redundancy while reducing hardware complexity.
2Reliability
If symmetric redundancy with full computing system backup is deployed, then fault tolerance is improved, but resource consumption increases due to unused computational overhead
Solution Approach 1:
The patent applies partial action by implementing redundancy only where necessary. The auxiliary computing system contains minimal components needed for failover, rather than maintaining full duplicate systems. The system performs redundancy functions selectively based on actual failure conditions, reducing unnecessary resource consumption while maintaining adequate fault tolerance.
Solution Approach 2:
The auxiliary computing system is designed with multi-functionality to perform both monitoring and backup operations. A single auxiliary system can replace multiple specialized redundant components, reducing overall resource consumption while maintaining fault tolerance through unified functionality.
3Ease of operation
If program data and state data are stored in the same location in redundant layers, then data management is simplified, but recovery time increases due to unnecessary data backup
Solution Approach 1:
The patent segments data storage by separating program data and state data into different memory devices. This segmentation allows the auxiliary computing system to selectively copy only state data during failover, excluding program data that remains unchanged. While this requires slightly more complex storage architecture, it dramatically reduces recovery time by minimizing the amount of data that must be transferred during failure events.
Data Source
AI summary
A system and method for enabling asymmetric computing redundancy are provided. The system includes a plurality of computing systems with an autonomy system, each comprising a memory device and a processor. The processors write state data to their respective state memory devices and receive data from the autonomy system. An auxiliary computing system functions as a monitor module or sensor suite processor that detects conditions such as processor malfunctions, auxiliary computing failures, or data corruption in one of the plurality of computing systems. In response, it deploys the state data to the auxiliary computing system and reconnects the affected system to the auxiliary system. Some embodiments include a separate program memory device for storing program data, which can be loaded onto the auxiliary computing system. The processors may be implemented as FPGAs or microcontrollers, and one of them could serve as the auxiliary computing system.