Asymmetric Conductive Elements in Package Stack Structures
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Solution Overview
Problem
In mobile electronic systems, the requirement for small-sized, thin, and lightweight components is not adequately met by existing semiconductor package structures due to complex signal routing and the need for multiple layers in package substrates, leading to increased size and complexity.
Innovation Solution
A package stack structure with functionally asymmetric conductive elements, where bonding pads and inter-package connectors are asymmetrically arranged to reduce the number of metal layers and simplify routing, allowing for a more compact design by integrating signal routes into a single layer and eliminating unnecessary layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If complex signal routing and multiple layers are used in package substrates, then signal transmission reliability is improved, but device size and structural complexity increase
Solution Approach 1:
The patent applies asymmetry by functionally separating bonding pads into two distinct groups: first bonding pads disposed near a first side of the semiconductor device for data signal transmission, and second bonding pads disposed near a second side for address and control signal transmission. This asymmetric arrangement simplifies the package substrate routing structure by reducing the number of metal layers needed, while maintaining reliable signal transmission through dedicated routing paths for each signal type.
Solution Approach 2:
The patent segments the bonding pads into functionally distinct groups based on signal type (data signals vs. address/control signals). This segmentation allows for simplified routing where data signal paths and address/control signal paths can be independently optimized with fewer metal layers, reducing overall package substrate complexity while ensuring reliable transmission for each signal category.
2Adaptability or versatility
If multiple metal layers are used in package substrates, then signal routing capability is improved, but manufacturing complexity and cost increase
Solution Approach 1:
The asymmetric disposition of bonding pads near opposite sides of the semiconductor device enables simplified routing architecture. First bonding pads for data signals and second bonding pads for address/control signals are separated spatially, allowing each signal type to be routed through dedicated metal layers or traces without requiring complex multi-layer interweaving, thus reducing manufacturing complexity while maintaining routing capability.
Solution Approach 2:
The patent applies local quality by providing different routing configurations for different signal types. Data signals routed from first bonding pads and address/control signals routed from second bonding pads can have optimized local routing paths tailored to their specific requirements, reducing the need for universal complex multi-layer routing structures and simplifying manufacturing.
3Ease of manufacture
If bonding pads are symmetrically arranged, then manufacturing alignment is simplified, but signal transmission performance and noise suppression deteriorate
Solution Approach 1:
The patent deliberately employs asymmetric arrangement of bonding pads, with first bonding pads near a first side and second bonding pads near a second side. This asymmetry improves signal transmission performance by separating data signal paths from address/control signal paths, reducing electromagnetic interference and crosstalk between different signal types, while the specific placement near device edges maintains manufacturing alignment feasibility.
4Volume of moving object
If compact package design is implemented, then device size is reduced, but signal loss and noise increase
Solution Approach 1:
The asymmetric bonding pad arrangement with first bonding pads near a first side and second bonding pads near a second side enables compact package design by optimizing the spatial distribution of electrical connections. This configuration shortens the average signal path lengths from bonding pads to their respective destinations on the package substrate, reducing signal loss and electromagnetic interference, thereby achieving compact size without compromising signal integrity.
Data Source
AI summary
A package stack structure may an upper package include an upper package substrate having a first edge and a second edge opposite to the first edge. The upper package substrate has a first region arranged near the first edge and a second region arranged near the second edge. A first upper semiconductor device is mounted on the upper package substrate. The package stack structure may also include a lower package having a lower package substrate and a lower semiconductor device. The lower package is connected to the upper package through a plurality of inter-package connectors. The plurality of the inter-package connectors may include first inter-package connectors configured to transmit data signals; second inter-package connectors configured to transmit address/control signals; third inter-package connectors configured to provide a supply voltage for an address/control circuit; and fourth inter-package connectors configured to provide a supply voltage for a data circuit.