Asymmetric Conductive Layer Substrate Warpage Control
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Solution Overview
Problem
Semiconductor device packages face warpage issues due to structural asymmetries and differences in conductive and dielectric layers, leading to reliability concerns during device attachment.
Innovation Solution
A substrate design with a first patterned conductive layer having two portions of different thicknesses, where one portion protrudes more than the other within a dielectric layer, and a second patterned conductive layer connected to the first, with specific manufacturing steps to form and embed these layers within the dielectric layers to balance warpage without altering the dielectric layer thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If symmetric structure is used for conductive and dielectric layers, then manufacturing is simpler, but warpage occurs due to structural asymmetries
Solution Approach 1:
The patent applies asymmetry by making the first patterned conductive layer have non-uniform thickness, with a first portion having greater thickness than a second portion. This asymmetric thickness distribution is specifically designed to counterbalance warpage forces caused by structural asymmetries in the dielectric layers, thereby improving substrate flatness and reliability while maintaining manufacturing feasibility
2Reliability
If dielectric layer thickness is increased to provide better protection, then reliability improves, but substrate thickness increases
Solution Approach 1:
The patent applies local quality by varying the thickness of the first patterned conductive layer across different regions. The first portion has greater thickness where additional support is needed, while the second portion has lesser thickness where less support is required. This localized thickness variation provides enhanced protection and warpage control in specific areas without increasing the overall substrate thickness
3Ease of manufacture
If uniform conductive layer thickness is used, then manufacturing is easier, but warpage control is insufficient
Solution Approach 1:
The patent deliberately introduces asymmetry in the conductive layer thickness, with the first portion having greater thickness than the second portion. This asymmetric design is specifically engineered to counterbalance warpage forces, demonstrating that controlled non-uniformity can improve warpage control while remaining manufacturable through standard deposition and patterning processes
Data Source
AI summary
A substrate for packaging a semiconductor device includes a first dielectric layer having a first surface and a second surface opposite to the first surface, a first patterned conductive layer adjacent to the first surface of the first dielectric layer, and a second patterned conductive layer adjacent to the second surface of the first dielectric layer and electrically connected to the first patterned conductive layer. The first patterned conductive layer includes a first portion and a second portion. Each of the first portion and the second portion is embedded in the first dielectric layer and protrudes relative to the first surface of the first dielectric layer toward a direction away from the second surface of the first dielectric layer. A thickness of the first portion of the first patterned conductive layer is greater than a thickness of the second portion of the first patterned conductive layer.