Asymmetric Multi-CPU System Dynamic Allocation
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Solution Overview
Problem
Existing asymmetric multi-CPU systems face inefficiencies in CPU resource utilization and power consumption due to limited CPU selection options, leading to suboptimal performance and unnecessary power usage, as they struggle to balance high data processing performance with low power consumption.
Innovation Solution
The system defines multiple forms of CPU combinations based on varying data processing performance and power consumption levels, allowing dynamic allocation of CPUs according to the data processing environment, using DVFS and virtual processor management to optimize performance and reduce power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If CPUs are exclusively switched between high data processing performance group and low power consumption group, then power consumption is reduced, but the maximum number of usable CPUs is limited to half of all CPUs
Solution Approach 1:
The patent applies dynamics by making the CPU selection configuration changeable rather than fixed. The system dynamically adjusts which CPUs are usable based on workload conditions, allowing the maximum number of usable CPUs to exceed half of all CPUs when needed. This resolves the contradiction by enabling both power saving modes (limiting to half) and high-performance modes (using more than half) as system conditions require.
2Loss of energy
If CPUs are exclusively switched between high data processing performance and low data processing performance groups, then power consumption is optimized, but intermediate data processing performance cannot be achieved
Solution Approach 1:
The patent applies local quality by allowing different CPUs to have different usability states simultaneously. Instead of forcing all CPUs into uniform high-performance or low-performance modes, the system can selectively enable specific CPUs based on individual workload requirements. This creates intermediate performance levels by combining different numbers and types of CPUs, achieving both power optimization and performance versatility.
3Productivity
If all CPUs are used to meet required processing performance, then data processing performance is ensured, but unnecessary power consumption occurs
Solution Approach 1:
The patent applies partial action by enabling a configurable number of CPUs greater than half of all CPUs to be usable simultaneously, but not necessarily all CPUs. The system can selectively activate the minimum required number of CPUs based on workload demands, avoiding the waste of powering up unnecessary CPUs while ensuring sufficient processing performance is achieved.
4Productivity
If CPU allocation is optimized by task scheduler or task dispatcher, then CPU resource utilization is improved, but kernel optimization is difficult to achieve
Solution Approach 1:
The patent introduces an intermediary mechanism through the CPU selection configuration that simplifies the optimization problem. Rather than requiring complex kernel-level task scheduler or task dispatcher modifications, the system uses a configurable CPU selection layer that manages CPU allocation. This intermediary approach achieves efficient CPU resource utilization without the difficulty of deep kernel optimization.
Data Source
AI summary
In an asymmetric multi-CPU system on which a plurality of type of CPUs with different data processing performance and power consumption are mounted in groups for each type, a plurality of forms of combination of the types and numbers of CPUs are defined in such a way that the maximum numbers of the overall data processing and power consumption very by stages. Then, the system performs a control of allocation of the data processing to the CPU identified by the form selected from the definition information according to the data processing environment, in order to reduce unnecessary power consumption according to the data processing environment, such as data processing load, and to easily achieve the required data processing performance.