Data Driving Device Asymmetric DAC Gate Load
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Solution Overview
Problem
The existing data driving devices for display panels experience significant peak current and current fluctuations in digital-to-analog converters (DACs), leading to increased power consumption and electromagnetic noise, which deteriorate image quality.
Innovation Solution
The implementation of a data driving device with a first and second channel circuit, each comprising DACs with different gate loads and switch configurations, and the use of P-DAC and N-DAC converters with distinct gate loads for the same grayscale values, along with buffers to amplify outputs, minimizes peak current and noise generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If DACs use standard switch configurations for digital-to-analog conversion, then conversion functionality is achieved, but peak current and electromagnetic noise increase significantly
Solution Approach 1:
The patent applies local quality by configuring different switch arrangements in different DAC channels. Specifically, odd-numbered DACs use one switch configuration while even-numbered DACs use a different configuration, creating localized variations in gate load characteristics that reduce overall peak current and electromagnetic noise
Solution Approach 2:
The patent implements asymmetry by intentionally designing asymmetric switch configurations across DAC channels. The gate loads of switches in odd-numbered DACs are made different from those in even-numbered DACs, creating an asymmetric pattern that distributes current draw more evenly and reduces simultaneous peak current events
2Device complexity
If all DACs operate with identical gate loads, then device simplicity is maintained, but current fluctuations and power consumption variations increase
Solution Approach 1:
The patent varies gate load characteristics locally across different DAC channels while maintaining overall system uniformity. Each DAC channel has a configured gate load pattern, with odd and even channels having complementary patterns that balance total power consumption and reduce fluctuations
3Measurement precision
If DAC switch states change frequently to accommodate varying grayscale values, then grayscale conversion accuracy is maintained, but gate load and power consumption increase
Solution Approach 1:
The patent employs periodic action by creating a repeating pattern of gate load distribution across DAC channels. The alternating configuration pattern between odd and even DACs creates a periodic structure that smooths power consumption over time while maintaining the ability to accurately represent all grayscale values
Data Source
AI summary
The embodiment relates to a data driving device for driving pixels of a display panel. In the data driving device, two adjacent DACs can have different gate loads for the same gray level value so that the fluctuation of the gate load according to the gray level value is reduced.