Asymmetric Diffusion Breaks for CMOS Carrier Mobility
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Solution Overview
Problem
Existing CMOS integrated circuits face challenges in achieving balanced carrier mobility in P-type and N-type semiconductor channel structures due to diffusion breaks, where either P-type or N-type channels experience improved mobility at the expense of the other, leading to detrimental effects on carrier mobility.
Innovation Solution
The implementation of asymmetric diffusion breaks with varying dimensions in P-type and N-type diffusion regions to induce specific strains, such as tensile or compressive stress, optimizing carrier mobility in one type without degrading the other, through the use of shallow trench isolation structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If diffusion breaks are introduced to provide electrical isolation between P-type and N-type diffusion regions, then electrical isolation between circuits is improved, but carrier mobility in one type of semiconductor channel structures deteriorates due to induced strain
Solution Approach 1:
The patent applies different diffusion break dimensions selectively in different diffusion regions. Specifically, a first diffusion break with a first dimension is formed in a first diffusion region, while a second diffusion break with a second dimension (different from the first) is formed in a second diffusion region. This local differentiation allows the diffusion breaks to provide electrical isolation while inducing appropriate strain levels for each region, thereby preventing carrier mobility degradation in any single region.
Solution Approach 2:
The patent employs asymmetric diffusion breaks where the dimensions of diffusion breaks vary across different regions. The first diffusion break has a first dimension and the second diffusion break has a second dimension that is asymmetric to the first. This asymmetry enables tailored strain induction in different diffusion regions, allowing electrical isolation to be achieved without uniformly degrading carrier mobility across all regions.
2Ease of manufacture
If diffusion breaks with uniform dimensions are used across all diffusion regions, then manufacturing simplicity is improved, but balanced carrier mobility across P-type and N-type channels cannot be achieved
Solution Approach 1:
The patent implements local quality by assigning different diffusion break dimensions to different diffusion regions based on their specific requirements. The first diffusion break in the first diffusion region has a first dimension, while the second diffusion break in the second diffusion region has a second dimension. This localized customization achieves balanced carrier mobility across P-type and N-type channels while maintaining a relatively simple manufacturing process.
Solution Approach 2:
The patent changes the dimensional parameter of diffusion breaks across different regions. By varying the dimension of diffusion breaks (from a first dimension in one region to a second dimension in another region), the patent optimizes carrier mobility in each region. This parameter variation allows achievement of balanced carrier mobility without requiring complex manufacturing processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances carrier mobility in semiconductor channels of one type while maintaining or improving it in the other type, thereby optimizing the performance of CMOS circuits by carefully managing strain induced by diffusion breaks.
Implementation Method 1
Diffusion breaks, which are formed in diffusion regions to electrically isolate respective portions, can induce strain in the diffusion regions with a magnitude of the induced strain related to a dimension of the diffusion breaks
Data Source
AI summary
Circuits employing asymmetric diffusion breaks in different type semiconductor diffusion regions are disclosed. In examples herein, diffusion breaks having dimensions asymmetric to each other are provided in different types of diffusion regions in a circuit to increase carrier mobility in semiconductor channels of a semiconductor device formed in different diffusion regions. In examples herein, the circuit includes a P-type and N-type semiconductor device(s) formed in a P-type and an N-type diffusion region(s), respectively, formed in the substrate. Complementary metal oxide semiconductor (CMOS) circuits can be realized from the P-type and N-type semiconductor devices. Diffusion breaks can induce strain in the diffusion regions with a magnitude of the induced strain related to a dimension of the diffusion breaks. As one example, an induced tensile strain may increase carrier mobility in N-type devices and decrease carrier mobility in P-type devices, with induced compressive strain having the opposite effect.