Asymmetric Doherty Power Amplifier Sizing for High-PAPR Linearity
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Solution Overview
Problem
Doherty power amplifiers face inefficiencies at lower power levels and when handling high peak-to-average ratio (PAPR) waveforms, particularly in load variation scenarios, which degrades linearity and spectral performance.
Innovation Solution
Implementing a Doherty power amplifier with asymmetric amplifier sizes, where the peaking amplifier has a smaller output transistor array size compared to the carrier amplifier, to achieve a sharper amplitude distortion response with minimal impact on phase distortion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a Doherty power amplifier uses traditional symmetric amplifier sizes, then the amplifier can operate efficiently at high power levels, but it experiences degraded linearity and spectral performance at lower power levels and high PAPR waveforms
Solution Approach 1:
The patent applies asymmetry by configuring the peaking amplifier with a smaller output transistor array size than the carrier amplifier. Specifically, the peaking amplifier's output transistor array size is set to 0.6 to 0.8 times that of the carrier amplifier. This asymmetric configuration optimizes the amplifier's performance across different power levels, improving linearity and spectral performance at lower power levels while maintaining efficiency at high power levels.
2Device complexity
If the peaking amplifier has the same output transistor array size as the carrier amplifier, then the amplifier structure is simple and symmetric, but the amplitude distortion response is not sharp enough and phase distortion increases
Solution Approach 1:
The patent implements asymmetry by setting the peaking amplifier's output transistor array size to be smaller (0.6 to 0.8 times) than the carrier amplifier's output transistor array size. This asymmetric design creates a sharper amplitude distortion response while maintaining acceptable phase distortion characteristics, resolving the trade-off between structural simplicity and performance precision.
3Manufacturing precision
If the output transistor array size of the peaking amplifier is reduced, then the linearity and adjacent channel leakage ratio improve, but the amplifier power handling capability may be reduced
Solution Approach 1:
The patent optimizes the output transistor array size parameter of the peaking amplifier, setting it to be 0.6 to 0.8 times that of the carrier amplifier. This parameter adjustment improves linearity and adjacent channel leakage ratio while the Doherty configuration ensures that power handling capability is maintained through the cooperative operation of the carrier and peaking amplifiers across different power levels.
Data Source
AI summary
Asymmetric Doherty power amplifiers are disclosed. In certain embodiments, a Doherty power amplifier includes a carrier amplifier that generates a radio frequency carrier signal based on amplifying a radio frequency input signal, a peaking amplifier that generates a radio frequency peaking signal based on amplifying the radio frequency input signal, and a phase shifting and combining circuit configured to combine the radio frequency carrier signal and the radio frequency peaking signal to generate a radio frequency output signal. The peaking amplifier has an amplifier size that is smaller than an amplifier size of the carrier amplifier.