Asymmetric On-State Resistance Driver for Multi-Drop DDR4 Signal Integrity
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Solution Overview
Problem
Conventional memory circuits experience weak output eye performance and signal distortion at high frequencies due to capacitive and inductive load impedances, leading to poor receiver margin tests in multi-drop DDR4 memory channels, especially with symmetric pullup/pulldown drivers causing excessive reflection.
Innovation Solution
An asymmetric on-state resistance driver is implemented, configured to drive read lines with an asymmetric voltage swing about half the reference voltage, reducing high side reflection and optimizing output eye performance by independently controlling pullup and pulldown resistances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a symmetric pullup/pulldown Ron driver is used in multi-drop DDR4 memory channels, then the driver provides balanced drive strength, but it introduces significantly more reflection due to extra drive strength already present on the line from off target terminations
Solution Approach 1:
The patent applies asymmetry by configuring the driver circuit with different pullup resistance (Rpu) and pulldown resistance (Rpd) values. Specifically, Rpu is set to a first resistance value while Rpd is set to a second resistance value, creating an asymmetric driver that compensates for the asymmetric loading conditions in multi-drop DDR4 memory channels. This asymmetric configuration reduces reflection by matching the driver characteristics to the actual line conditions rather than using symmetric resistance values.
2Stability of the object's composition
If off-target termination is VDD referenced, then the termination provides stable voltage reference, but it creates capacitive and inductive load impedances that result in weak output eye performance at high frequencies
Solution Approach 1:
The patent changes the resistance parameters of the driver circuit by independently configuring different resistance values for pullup (Rpu) and pulldown (Rpd) paths. This parameter adjustment allows the driver to compensate for the capacitive and inductive load impedances introduced by VDD-referenced off-target termination, thereby maintaining stable voltage reference while improving output eye performance at high frequencies.
3Device complexity
If conventional symmetric driver design is used, then the circuit implementation is simple, but the distortion caused by pins, connectors and traces limits the upper frequency for reliable data transmission
Solution Approach 1:
The patent implements asymmetry in the driver circuit by using different resistance values for pullup and pulldown paths. This asymmetric configuration, while slightly increasing circuit complexity, enables the driver to better handle signal distortion from pins, connectors and traces, thereby extending the upper frequency limit for reliable data transmission in DDR4 memory channels.
Data Source
AI summary
An apparatus comprises a plurality of driver circuits and a control registers block. The plurality of driver circuits may be configured to drive a read line in response to a memory signal and a reference voltage. The control registers block generally configures the plurality of driver circuits to implement an asymmetric voltage swing of the read line about a voltage level that is half of the reference voltage.