Asymmetric Dual-Side Module Layout for Lower Thermal Stress

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Solution Overview

Problem

Existing power semiconductor packages face challenges in managing thermal stress and material stress during assembly and manufacturing, particularly in dual side cooling configurations with stacked substrates.

Innovation Solution

The implementation of a semiconductor package design featuring asymmetrically coupled substrates through a lead frame, utilizing spacers or cross-sectional leads to reduce stress, and incorporating direct bonded copper substrates with ceramic materials for improved thermal management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If substrates are symmetrically stacked through a lead frame, then structural simplicity is maintained, but thermal stress and material stress increase during assembly and manufacturing

Engineering Contradiction:
Improvestructural simplicityVSAvoidthermal stress and material stress
Core Design Contradiction:
Device complexityVSStress or pressure

Solution Approach 1:

The patent applies asymmetry by configuring substrates with different footprints where the second substrate has a larger area than the first substrate. This asymmetric arrangement allows the mold compound to flow more effectively during encapsulation while distributing thermal and material stress more evenly across the package structure, resolving the contradiction between structural simplicity and stress management

Inventive Principle:
Principle #4Asymmetry

2Reliability

If mold compound encapsulates the entire lead frame, then electrical insulation is improved, but mold flow is restricted causing manufacturing difficulties

Engineering Contradiction:
Improveelectrical insulationVSAvoidmold flow during encapsulation
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies local quality by exposing specific regions of the second substrate perimeter through the mold compound while maintaining encapsulation of other areas. This selective exposure creates optimal pathways for mold compound flow during manufacturing while preserving electrical insulation where needed, resolving the contradiction between insulation reliability and manufacturing ease

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250336783A1Low stress asymmetric dual side module
Publication Date: 2025.10.30 SEMICON COMPONENTS IND LLC
  • US20250336783A1 patent drawing
  • US20250336783A1 patent drawing
  • US20250336783A1 patent drawing

AI summary

Implementations of semiconductor packages may include a first substrate having two or more die coupled to a first side, a clip coupled to each of the two or more die on the first substrate and a second substrate having two or more die coupled to a first side of the second substrate. A clip may be coupled to each of the two or more die on the second substrate. The package may include a lead frame between the first substrate and the second substrate and a molding compound. A second side of each of the first substrate and the second substrate may be exposed through the molding compound. A perimeter of the first substrate and a perimeter of the second substrate may not fully overlap when coupled through the lead frame.