Asymmetric Dummy Cells for Semiconductor Layout Optimization

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Solution Overview

Problem

Existing semiconductor device layouts face challenges due to large amounts of unused white space caused by simple symmetric dummy cells and a lack of design flexibility when abutting functional blocks with specific edge patterns.

Innovation Solution

The use of asymmetric pattern bridge dummy cells situated between functional blocks with known layout patterns, which are configured to fit between different types of standard logic cells, macros, and SRAM blocks, and are inserted along the edges or within functional blocks to bridge gaps and improve layout efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If simple symmetric dummy cells are used to fill white space around functional blocks, then the placement process is simplified, but a large amount of unused white space area remains

Engineering Contradiction:
Improveplacement process simplicityVSAvoidchip area
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The patent introduces asymmetric dummy cells with different shapes and configurations (e.g., elongated dummy cells, dummy cells with different active region positions) to fill white space more efficiently. These asymmetric dummy cells can adapt to various spacing requirements between functional blocks, reducing unused white space area while maintaining placement process simplicity through automated selection and placement.

Inventive Principle:
Principle #4Asymmetry

2Adaptability or versatility

If a generalized program is used to fill white space with dummy cells, then a broad range of scenarios is covered, but design flexibility is reduced

Engineering Contradiction:
Improvescenario coverageVSAvoiddesign flexibility
Core Design Contradiction:
Adaptability or versatilityVSEase of operation

Solution Approach 1:

The patent employs different types of dummy cells (symmetric, asymmetric, elongated, corner-aligned) with specific characteristics tailored to local requirements. The system can select and place appropriate dummy cell types based on the specific geometric and electrical requirements of each white space region, providing both broad scenario coverage and design flexibility through localized optimization.

Inventive Principle:
Principle #3Local quality

3Reliability

If functional blocks with edge patterns are abutted together, then design rules are satisfied, but design flexibility is limited due to matching constraints

Engineering Contradiction:
ImproveDRC complianceVSAvoiddesign flexibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent introduces dummy cells as intermediary elements between functional blocks with specific edge patterns. These dummy cells act as mediators that satisfy design rules and spacing requirements while allowing greater flexibility in functional block placement. The dummy cells can be configured to match various edge patterns, enabling DRC compliance without constraining the overall design flexibility.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12299371B2Dummy cells placed adjacent functional blocks
Publication Date: 2025.05.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12299371B2 patent drawing
  • US12299371B2 patent drawing
  • US12299371B2 patent drawing

AI summary

A device including functional blocks and dummy cells. The functional blocks include a first functional block and a second functional block. Each dummy cell having a cell boundary defined by non-functioning active areas and non-functioning gates for filling space between the functional blocks and including a dummy cell configured to be situated between the first functional block and the second functional block such that the dummy cell directly abuts each of the first functional block and the second functional block.