Asymmetric Metal Gate Runners for Faster Power Semiconductor Switching
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Solution Overview
Problem
Conventional metal gate runner designs in power semiconductor devices face sub-optimal trade-offs between switching speed and on-state resistance, often resulting in reduced active region size and increased on-state resistance due to symmetrical designs and uniform segment spacing, which negatively impact performance.
Innovation Solution
Implementing asymmetric metal gate runners with a single outer segment connection to the gate pad and varying spacings between parallel segments, along with inner gate runners featuring a spine and ribs, to optimize switching speed and reduce on-state resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If symmetrical metal gate runner designs with uniform segment spacing are used, then manufacturing simplicity is maintained, but switching speed is reduced and on-state resistance increases
Solution Approach 1:
The patent applies asymmetry by designing the metal gate runner with non-uniform segment spacing where the first spacing between adjacent segments is different from the second spacing. This asymmetric configuration optimizes the electric field distribution and reduces parasitic inductance, thereby improving switching speed while maintaining manufacturing feasibility through a systematic design approach.
Solution Approach 2:
The metal gate runner is divided into multiple discrete segments rather than being continuous. This segmentation allows for optimized spacing between segments that reduces parasitic effects and improves switching performance. The segmented structure enables independent optimization of different regions of the gate runner to balance speed and resistance characteristics.
2Ease of manufacture
If larger metal gate runner segments are used, then manufacturing ease is improved, but active region size is reduced and on-state resistance increases
Solution Approach 1:
The gate runner is segmented into multiple smaller sections rather than using a single large continuous structure. This segmentation allows the segments to be positioned strategically to minimize encroachment on the active region while maintaining adequate spacing for manufacturing. The segmented approach enables optimization of both fabrication ease and active area utilization.
Solution Approach 2:
Different regions of the gate runner have different segment spacings tailored to local requirements. Areas closer to the active region have optimized spacing to minimize resistance, while other areas have spacing that facilitates manufacturing. This local optimization allows the design to address both ease of manufacture and active region size preservation simultaneously.
3Reliability
If uniform segment spacing is used in metal gate runners, then design simplicity is maintained, but performance trade-offs between switching speed and on-state resistance are sub-optimal
Solution Approach 1:
The patent implements asymmetric segment spacing where the first spacing between adjacent segments differs from the second spacing. This asymmetric design optimizes the balance between switching speed and on-state resistance by creating non-uniform electric field distribution that reduces parasitic effects during switching transitions while maintaining adequate spacing for reliable operation.
Solution Approach 2:
The patent changes the geometric parameters of the gate runner by varying the spacing between segments. By adjusting these dimensional parameters, the design optimizes the trade-off between switching speed and on-state resistance, achieving superior performance consistency without requiring complex additional structures.
Data Source
AI summary
Semiconductor devices comprise a semiconductor layer structure having an active region therein, a gate pad on the semiconductor layer structure and positioned to be closest to a first side of the active region, a plurality of gate electrodes, and a metal gate runner that electrically connects the gate pad to at least some of the gate electrodes. The metal gate runner comprises an outer runner that extends around a portion of a periphery of the active region. The outer gate runner comprises a first outer segment that extends along at least a portion of the first side of the active region and a second outer segment that extends along at least a portion of a second side of the active region that connects to the first side, but the outer gate runner does not extend along a third side of the active region that is opposite the second side.