Asymmetric Multi-Core GPU With Instruction Distributor
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing processor architectures in devices like IoT devices are optimized for specific tasks but fall short in others, leading to inefficient power consumption and limited capabilities, particularly due to the complexity of asymmetrical multi-core GPU systems that require separate instruction sets for different GPU workloads.
Innovation Solution
An asymmetric multi-core heterogeneous parallel processing system is implemented, comprising a first group of primary GPUs with a lower power consumption profile and a second group with a higher profile, along with an instruction distributor that directs instructions based on workload requirements, allowing for load balancing and power optimization by executing instructions on either group based on precision and quality of service needs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate instruction sets are used for different GPU workloads, then task specialization is improved, but device complexity increases
Solution Approach 1:
The patent implements a unified instruction set architecture that can be executed by multiple GPU core types (fixed-point and floating-point cores). The instruction distributor analyzes incoming instructions and routes them to appropriate core types based on the operation type, eliminating the need for separate instruction sets for different GPU workloads while maintaining task specialization capabilities.
2Productivity
If high-performance GPU cores are used, then processing capability is improved, but power consumption increases
Solution Approach 1:
The patent divides the GPU into two distinct groups of cores: fixed-point cores optimized for lower-power operations and floating-point cores optimized for high-performance operations. The instruction distributor segments the workload by analyzing each instruction and routing it to the appropriate core type, enabling the system to use high-performance cores only when necessary and thereby reducing overall power consumption while maintaining processing capability.
3Adaptability or versatility
If asymmetric multi-core GPU system is implemented, then rendering capability is improved, but instruction generation overhead increases
Solution Approach 1:
The patent implements a unified instruction set architecture that can be executed by multiple GPU core types (fixed-point and floating-point cores). The instruction distributor analyzes incoming instructions and routes them to appropriate core types based on the operation type, eliminating the need for separate instruction sets for different GPU workloads while maintaining task specialization capabilities.
Data Source
AI summary
A multi-core asymmetric graphics processing unit (GPU) includes a first group and second group of GPU cores. The first group of GPU cores has a first microarchitecture and a first power consumption profile. The first group of GPU cores is configured to execute a subset of instructions of an instruction set architecture (ISA). The second group of GPU cores have a second microarchitecture and a second power consumption profile higher than the first power consumption profile, and are configured to execute the entire ISA. The first group and second group of GPU cores may be further differentiated by a number of pipeline stages, number of registers, branching execution, vectorization units, or combinations thereof. A subset of GPU cores in either group may have a different operation frequency. In some embodiments, an executable instruction may include an indicator to ascertain if execution is performed by the first or second group of GPU cores.