Asymmetric IC Package Pinout Design
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Solution Overview
Problem
In electronics manufacturing, the traditional approach to IC packaging for product families with additional features and functionalities leads to unnecessary increases in package size, cost, and complexity by symmetrically expanding pin counts, which does not optimize package size and increases material costs.
Innovation Solution
The method involves creating a package with a common pin-out for the chip core and adding additional pins asymmetrically in specific directions to accommodate additional circuits and features, maintaining compatibility while optimizing package size by placing additional pads only in the directions where additional circuits are added, thus altering the geometric center of the package.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If additional pins are added symmetrically around the geometric center to accommodate additional features, then the package can support more functionality, but the package size increases unnecessarily
Solution Approach 1:
The patent applies asymmetry by placing additional pins asymmetrically with respect to the geometric center of the package. Instead of adding pins symmetrically in all directions, the additional pins are positioned only in the directions where additional circuits or features are actually located, optimizing package size while maintaining compatibility with the chip core
2Adaptability or versatility
If package size is increased to accommodate additional pins, then more features can be supported, but material costs increase
Solution Approach 1:
By positioning additional pins asymmetrically rather than symmetrically, the package size is minimized to only the extent necessary to accommodate the additional features. This reduces the amount of packaging material required while still supporting the expanded functionality, thereby reducing material costs
3Adaptability or versatility
If package size is increased to accommodate additional pins, then more features can be supported, but design complexity increases
Solution Approach 1:
The asymmetric pin placement simplifies the package design by eliminating the need for symmetric expansion. The design process becomes more straightforward as pins are added only where needed rather than requiring balanced symmetric growth, reducing design complexity while maintaining versatility
Solution Approach 2:
The patent segments the pin-out into a common pin-out for the chip core and additional pins for extra features. This segmentation allows the core functionality to remain unchanged while adding features selectively, reducing overall design complexity
Data Source
AI summary
An Integrated Circuit (IC) package comprises a package comprising a first set of pads having a pinout that is compatible with a chip core of a product family. A second set of pads are on substantially the same plane as the first set of pads and outside the package core. The second set of pads is configured to accommodate a circuit outside the chip core. The geometric center of the package core is different from the geometric center of the IC package.