Asymmetric IGFET Doping for Threshold Stability
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Solution Overview
Problem
Existing semiconductor technologies face challenges in controlling short-channel IGFETs due to surface and bulk punchthrough, which affect the reliability and performance of integrated circuits, especially in mixed-signal applications where analog and digital requirements conflict.
Innovation Solution
An asymmetric IGFET design is implemented with a channel zone of a semiconductor body, featuring source and drain zones of opposite conductivity type, a gate dielectric layer, and a gate electrode, where the drain extension is more lightly doped and extends further laterally than the source extension, reducing impact ionization and hot carrier injection into the gate dielectric layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the channel length is reduced to improve integration density and productivity, then the IGFET operates in short-channel regime with improved productivity, but surface and bulk punchthrough occur causing threshold voltage instability and reduced reliability
Solution Approach 1:
The patent applies local quality by creating asymmetric doping concentrations in the channel zone - a first dopant concentration in a first portion of the channel and a second dopant concentration in a second portion, where the concentrations differ. This local variation in dopant concentration allows the channel to maintain stability against punchthrough effects while operating at reduced channel lengths for high integration density.
Solution Approach 2:
The patent implements asymmetry by configuring the source and drain extensions with different doping characteristics - the first extension has a first dopant concentration while the second extension has a second dopant concentration, creating an asymmetric structure that compensates for short-channel effects and prevents surface and bulk punchthrough.
2Ease of manufacture
If symmetric source and drain extensions are used to simplify manufacturing, then ease of manufacture is improved, but hot carrier injection into the gate dielectric layer increases reducing device longevity
Solution Approach 1:
The patent applies local quality by differentiating the doping characteristics of the source and drain extensions - the first extension receives a first dopant concentration while the second extension receives a second dopant concentration. This local differentiation reduces hot carrier injection into the gate dielectric layer, thereby extending device longevity while remaining compatible with standard fabrication processes.
3Reliability
If higher dopant concentration is used in the channel zone to prevent punchthrough, then threshold voltage stability is improved, but hot carrier generation increases leading to more hot carrier injection into the gate dielectric
Solution Approach 1:
The patent applies local quality by spatially separating the dopant concentration functions - higher dopant concentrations are localized in the source and drain extensions to prevent punchthrough, while the channel zone maintains lower dopant concentration to minimize hot carrier generation. This local differentiation allows threshold voltage control without excessive hot carrier injection.
Solution Approach 2:
The patent implements asymmetry by configuring different dopant concentrations in symmetrically positioned source and drain extensions, creating an asymmetric doping profile that optimizes the balance between preventing punchthrough and minimizing hot carrier effects through strategic placement of dopant regions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The asymmetric IGFET design enhances the stability of the threshold voltage and reduces hot carrier injection, leading to improved performance and longevity, making it suitable for both analog and digital applications within mixed-signal ICs.
Implementation Method 1
The drain extension is more lightly doped than the source extension. The doping in the lateral extensions is provided by composite semiconductor dopant of the second conductivity type referred to here, for convenience, as the total S/D-extension dopant. The concentration of the total S/D-extension dopant reaches a subsurface maximum concentration in each lateral extension.
Data Source
AI summary
An asymmetric insulated-gate field-effect transistor (100 or 102) has a source (240 or 280) and a drain (242 or 282) laterally separated by a channel zone (244 or 284) of body material (180 or 182) of a semiconductor body. A gate electrode (262 or 302) overlies a gate dielectric layer (260 or 300) above the channel zone. A more heavily doped pocket portion (250 or 290) of the body material extends largely along only the source. The source has a main source portion (240M or 280M) and a more lightly doped lateral source extension (240E or 280E). The drain has a main portion (242M or 282M) and a more lightly doped lateral drain extension (242E or 282E). The drain extension is more lightly doped than the source extension. The maximum concentration of the semiconductor dopant defining the two extensions occurs deeper in the drain extension than in the source extension. Additionally or alternatively, the drain extension extends further laterally below the gate electrode than the source extension. These features enable the threshold voltage to be highly stable with operational time.