Asymmetric Integrated Transformer for RF Chip Area Reduction

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Solution Overview

Problem

Integrated circuits face challenges in minimizing the area occupied by passive elements like inductors and transformers while maintaining high quality factor Q and coupling coefficient K, which affects manufacturing costs and chip performance.

Innovation Solution

An asymmetric integrated transformer design is implemented, using a primary inductor with a B turns spiral winding from a first metal layer and an A turns winding from a second metal layer, with overlapping turns, and a secondary inductor with a C turns winding from the second metal layer and overlapping windings from the first metal layer, optimizing inductance and coupling in a small area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If traditional discrete transformer elements are used in integrated circuits, then signal coupling and impedance matching functions are achieved, but the chip area occupied by passive elements increases significantly

Engineering Contradiction:
Improvechip areaVSAvoidquality factor Q and coupling coefficient K
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent merges the primary and secondary windings into a single integrated transformer structure where both windings share common magnetic core and are fabricated on the same chip substrate. This integration reduces the total area compared to discrete elements while maintaining the necessary coupling and quality factors through optimized winding geometry and magnetic path design.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The transformer windings are arranged in a nested configuration where the primary and secondary windings are positioned concentrically or adjacently on the same chip area. This nesting approach maximizes the use of available space, allowing both windings to occupy overlapping or adjacent regions rather than requiring separate discrete component areas.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Area of stationary object

If the area of passive elements is reduced to minimize chip area, then manufacturing costs decrease, but the quality factor Q and coupling coefficient K specifications deteriorate

Engineering Contradiction:
Improvepassive element areaVSAvoidquality factor Q and coupling coefficient K
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The patent applies local quality optimization by varying the winding geometry, turn density, and magnetic path characteristics in different regions of the transformer. The primary and secondary windings are designed with specific local properties (such as different turn ratios, winding patterns, or magnetic permeability distributions) that maintain high Q and K values while minimizing overall area. This local optimization allows the transformer to achieve superior performance in a compact footprint.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances the quality factor and coupling coefficient, reducing chip area and manufacturing costs while optimizing element specifications, allowing for efficient single-end to differential conversion and impedance matching in radio frequency integrated circuits.

Implementation Method 1

An integrated transformer comprises a primary inductor and a secondary inductor wherein the primary inductor comprises a B turns spiral winding formed by a first metal layer and an A turns winding formed by a second metal layer, wherein the A turns winding formed by the second metal layer and the innermost turns of the B turns spiral winding formed by the first metal layer are substantially overlapped; the secondary inductor comprises a C turns winding at least formed by the second metal layer, wherein the C turns winding formed by the second metal layer of the secondary inductor and a portion of windings formed by the first metal layer of the primary inductor are substantially overlapped

Methodology Applied
Scientific EffectElectromagnetic induction: Electromagnetic Induction

Data Source

PatentUS9748033B2Integrated transformer
Publication Date: 2017.08.29 REALTEK SEMICON CORP
  • US9748033B2 patent drawing
  • US9748033B2 patent drawing
  • US9748033B2 patent drawing

AI summary

An integrated transformer includes a primary inductor and a secondary inductor wherein the primary inductor includes a B turns spiral winding formed by a first metal layer and an A turns winding formed by a second metal layer, wherein the A turns winding formed by the second metal layer and the innermost turns of the B turns spiral winding formed by the first metal layer are substantially overlapped; and the secondary inductor includes a C turns winding at least formed by the second metal layer, wherein the C turns winding formed by the second metal layer of the secondary inductor and a portion of the winding formed by the first metal layer of the primary inductor are substantially overlapped, wherein A is not bigger than B, and A is not bigger than C.