Asymmetric Interposer Routing for Flexible Data Interfaces

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Solution Overview

Problem

Information handling systems face challenges in efficiently configuring and interconnecting devices and processors with varying data communication interfaces, requiring a flexible and efficient interconnect solution that can adapt to different orientations and interface widths.

Innovation Solution

An asymmetric high-speed interconnect routing interposer is introduced, which connects devices and processors through a socket system with interchangeable orientations, allowing for either 16-bit or bifurcated 8-bit data communication interfaces, enabling flexible routing and efficient data transfer based on the interposer's installation orientation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a fixed-configuration interconnect is used, then device compatibility is simplified, but adaptability to different interface widths and orientations is reduced

Engineering Contradiction:
Improveadaptability to different interface widthsVSAvoidinterconnect configuration complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The interconnect configuration is made dynamic through the interposer's ability to be installed in different orientations (first and second orientations), allowing the system to adapt between 16-bit single interface mode and 8-bit dual interface mode based on operational requirements, rather than being fixed in a single configuration

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The interposer serves multiple functions by supporting both 16-bit and 8-bit interface widths through its dual-orientation capability, enabling a single component to handle different data communication requirements without requiring separate specialized interconnects for each interface type

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If a single 16-bit interface is used, then hardware complexity is reduced, but flexibility in data communication configurations is limited

Engineering Contradiction:
Improvedata communication configuration flexibilityVSAvoidinterface configuration options
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The 16-bit data communication interface is segmented into two separate 8-bit interfaces when the interposer is installed in the second orientation, allowing independent configuration and connection of device 112 and device 114 to different host processors, thereby increasing configuration flexibility without requiring a completely different interconnect architecture

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If interchangeable orientation sockets are used, then routing flexibility is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improverouting flexibilityVSAvoidinterposer installation orientation precision
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The socket and interposer are designed with asymmetric features that enable directional installation, where the interposer can be installed in one of two specific orientations. This asymmetric design provides routing flexibility while maintaining manageable manufacturing precision requirements through clear orientation guidance rather than requiring extremely tight tolerances for arbitrary angular positioning

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS11417994B2Asymmetric high-speed interconnect routing interposer
Publication Date: 2022.08.16 DELL PROD LP
  • US11417994B2 patent drawing
  • US11417994B2 patent drawing
  • US11417994B2 patent drawing

AI summary

An information handling system includes a first device having a first data communication interface connected to a first socket area of a socket. A second device includes a second data communication interface connected to a second socket area of the socket. A host processor includes a third data communication interface connected to a third socket area of the socket. When an interposer is installed into the socket in a first orientation, the interposer connects the first data communication interface to the third data communication interface. When the interposer is installed into the socket in a second orientation, the interposer connects the first data communication interface to the second data communication interface.